"Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic ..."

Piotr Patronik, Stanislaw J. Piestrak (2017)

> Home

Details and statistics

DOI: 10.1109/TCSI.2017.2669108

access: closed

type: Journal Article

metadata version: 2020-05-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/PatronikP17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/PatronikP17
Piotr Patronik, Stanislaw J. Piestrak:
Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic Units. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1031-1039 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.