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ORCIDBabak Nejati
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2010 – 2019
- 2011
[c5]Alberto Cicalini, Sankaran Aniruddhan, Rahul Apte, Frederic Bossu, Ojas Choksi, Dan Filipovic, Kunal Godbole, Tsai-Pi Hung, Christos Komninakis, David Maldonado, Chiewcharn Narathong, Babak Nejati, Deirdre O'Shea, Xiaohong Quan, Raj Rangarajan, Janakiram Sankaranarayanan, Andrew See, Ravi Sridhara, Bo Sun, Wenjun Su, Klaas van Zalinge, Gang Zhang, Kamal Sahota:
A 65nm CMOS SoC with embedded HSDPA/EDGE transceiver, digital baseband and multimedia processor. ISSCC 2011: 368-370
2000 – 2009
- 2007
- [c4]Babak Nejati, Larry Larson:
Power/Area Trade-Offs in Low-Power/Low-Area Unary-R-2R CMOS Digital-to-Analog Converters. ISCAS 2007: 1473-1476 - 2006
- [c3]Babak Nejati, Lawrence Larson:
An Area Optimized 2.5-V 10-b 200-MS/s 200-μA CMOS DAC. CICC 2006: 161-164 - 2004
- [j1]Babak Nejati, Omid Shoaei
:
Systematic design of the pipelined analog-to-digital converter with radix<2. Microelectron. J. 35(9): 767-776 (2004) - [c2]Babak Nejati, Omid Shoaei:
A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter. ISCAS (1) 2004: 73-76 - 2001
- [c1]Babak Nejati, Omid Shoaei:
A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS. ISCAS (1) 2001: 576-579
Coauthor Index
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