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ORCIDMary Jane Irwin
Person information
- affiliation: Penn State, University Park, USA
- award (2010): ACM Athena Lecturer
- award (2007): Anita Borg Institute Women of Vision Awards
- award (2005): ACM Distinguished Service Award
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Books and Theses
- 1977
[b1]Mary Jane Irwin:
An Arithmetic Unit for on-Line Computation. University of Illinois Urbana-Champaign, USA, 1977
Journal Articles
- 2016
- [j94]Mary Jane Irwin, Soha Hassoun:
Steven P. Levitan (1950-2016). IEEE Des. Test 33(3): 142-143 (2016) - 2015
- [j93]Hsiang-Yun Cheng
, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie:
EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors. ACM Trans. Archit. Code Optim. 12(2): 17:1-17:22 (2015) - [j92]Hsiang-Yun Cheng, Mary Jane Irwin, Yuan Xie:
Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference. ACM Trans. Design Autom. Electr. Syst. 21(1): 7:1-7:26 (2015) - 2013
- [j91]Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Design of energy-efficient circuits and systems using tunnel field effect transistors. IET Circuits Devices Syst. 7(5): 294-303 (2013) - 2011
- [j90]Guiling Wang, Mary Jane Irwin, Haoying Fu, Piotr Berman, Wensheng Zhang, Tom La Porta:
Optimizing sensor movement planning for energy efficiency. ACM Trans. Sens. Networks 7(4): 33:1-33:17 (2011) - 2010
- [j89]Mary Jane Irwin:
Technology scaling redirects main memories: technical perspective. Commun. ACM 53(7): 98 (2010) - [j88]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
On-chip memory space partitioning for chip multiprocessors using polyhedral algebra. IET Comput. Digit. Tech. 4(6): 484-498 (2010) - [j87]Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin:
On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. 7(3): 240-254 (2010) - [j86]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Total Power Optimization for Combinational Logic Using Genetic Algorithms. J. Signal Process. Syst. 58(2): 145-160 (2010) - 2009
- [j85]Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin:
Adapting application execution in CMPs using helper threads. J. Parallel Distributed Comput. 69(9): 790-806 (2009) - [j84]Madhu Mutyam, Feng Wang, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin:
Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers 58(7): 865-877 (2009) - [j83]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
Using Data Compression for Increasing Memory System Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(6): 901-914 (2009) - [j82]Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu:
Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. IEEE Trans. Dependable Secur. Comput. 6(3): 202-216 (2009) - [j81]Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-assisted soft error detection under performance and energy constraints in embedded systems. ACM Trans. Embed. Comput. Syst. 8(4): 27:1-27:30 (2009) - 2008
- [j80]Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari:
Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Secur. Comput. 5(2): 115-127 (2008) - [j79]Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Design Space Exploration for 3-D Cache. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 444-455 (2008) - 2007
- [j78]Ronald F. Boisvert, Mary Jane Irwin, Holly E. Rushmeier:
Evolving the ACM journal distribution program. Commun. ACM 50(9): 19-20 (2007) - [j77]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Optimising power efficiency in trace cache fetch unit. IET Comput. Digit. Tech. 1(4): 334-348 (2007) - [j76]Feng Wang, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
On-chip bus thermal analysis and optimisation. IET Comput. Digit. Tech. 1(5): 590-599 (2007) - [j75]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems 31(5): 293-301 (2007) - [j74]Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. 49(1): 87-99 (2007) - 2006
- [j73]Ronald F. Boisvert, Mary Jane Irwin:
Plagiarism on the rise. Commun. ACM 49(6): 23-24 (2006) - [j72]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
An efficient architecture for motion estimation and compensation in the transform domain. IEEE Trans. Circuits Syst. Video Technol. 16(2): 191-201 (2006) - [j71]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. IEEE Trans. Circuits Syst. Video Technol. 16(5): 655-662 (2006) - [j70]Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embed. Comput. Syst. 5(1): 1-28 (2006) - [j69]Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam:
Reducing code size through address register assignment. ACM Trans. Embed. Comput. Syst. 5(1): 225-258 (2006) - [j68]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Block-based frequency scalable technique for efficient hierarchical coding. IEEE Trans. Signal Process. 54(7): 2559-2566 (2006) - 2005
- [j67]Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin:
Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. Adv. Comput. 63: 36-92 (2005) - [j66]Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli:
Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. 22(5): 434-442 (2005) - [j65]Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin:
Symmetric encryption in reconfigurable and custom hardware. Int. J. Embed. Syst. 1(3/4): 205-217 (2005) - [j64]Mary Jane Irwin, Narayanan Vijaykrishnan:
Editorial. ACM J. Emerg. Technol. Comput. Syst. 1(1): 1-6 (2005) - [j63]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
An integer linear programming-based tool for wireless sensor networks. J. Parallel Distributed Comput. 65(3): 247-260 (2005) - [j62]Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das:
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. IEEE Trans. Computers 54(6): 660-671 (2005) - [j61]Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
Compiler-directed high-level energy estimation and optimization. ACM Trans. Embed. Comput. Syst. 4(4): 819-850 (2005) - [j60]Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing data reuse for cache reconfiguration. ACM Trans. Embed. Comput. Syst. 4(4): 851-876 (2005) - [j59]Mahmut T. Kandemir, Mary Jane Irwin, Guangyu Chen, Ibrahim Kolcu:
Compiler-guided leakage optimization for banked scratch-pad memories. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1136-1146 (2005) - [j58]Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Soft errors issues in low-power caches. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1157-1166 (2005) - 2004
- [j57]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Optimizing Leakage Energy Consumption in Cache Bitlines. Des. Autom. Embed. Syst. 9(1): 5-18 (2004) - [j56]Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reducing instruction cache energy consumption using a compiler-based strategy. ACM Trans. Archit. Code Optim. 1(1): 3-33 (2004) - [j55]Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh:
A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(2): 243-260 (2004) - [j54]Guangyu Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices. IEEE Trans. Parallel Distributed Syst. 15(9): 795-809 (2004) - [j53]Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Characterization and modeling of run-time techniques for leakage power reduction. IEEE Trans. Very Large Scale Integr. Syst. 12(11): 1221-1233 (2004) - [j52]Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Instruction Scheduling for Low Power. J. VLSI Signal Process. 37(1): 129-149 (2004) - 2003
- [j51]Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan:
Leakage Current: Moore's Law Meets Static Power. Computer 36(12): 68-75 (2003) - [j50]Mary Jane Irwin:
Power-Aware Designers at Odds with Power Grid Designers? IEEE Des. Test Comput. 20(3): 120- (2003) - [j49]Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam:
Managing Leakage Energy in Cache Hierarchies. J. Instr. Level Parallelism 5 (2003) - [j48]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte:
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. IEEE Trans. Computers 52(1): 59-76 (2003) - [j47]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin:
Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embed. Comput. Syst. 2(2): 163-185 (2003) - 2002
- [j46]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Using Memory Compression for Energy Reduction in an Embedded Java System. J. Circuits Syst. Comput. 11(5): 537-556 (2002) - [j45]Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko:
Tuning garbage collection for reducing memory system energy in an embedded java environment. ACM Trans. Embed. Comput. Syst. 1(1): 27-55 (2002) - [j44]D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans. Very Large Scale Integr. Syst. 10(6): 844-855 (2002) - [j43]Ning An, Sudhanva Gurumurthi, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-performance trade-offs for spatial access methods on memory-resident data. VLDB J. 11(3): 179-197 (2002) - 2001
- [j42]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Hardware and Software Techniques for Controlling DRAM Power Modes. IEEE Trans. Computers 50(11): 1154-1173 (2001) - [j41]Rita Yu Chen, Mary Jane Irwin, Raminder Singh Bajwa:
Architecture-level power estimation and design experiments. ACM Trans. Design Autom. Electr. Syst. 6(1): 50-66 (2001) - [j40]Benjamin Bishop, V. Lyuboslavsky, Narayanan Vijaykrishnan, Mary Jane Irwin:
Design considerations for databus charge recovery. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 104-106 (2001) - [j39]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye:
Influence of compiler optimizations on system power. IEEE Trans. Very Large Scale Integr. Syst. 9(6): 801-804 (2001) - [j38]G. Esakkimuthu, Hyun Suk Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Investigating Memory System Energy Behavior Using Software and Hardware Optimizations. VLSI Design 12(2): 151-165 (2001) - 2000
- [j37]Mary Jane Irwin:
Editorial. ACM Trans. Design Autom. Electr. Syst. 5(3): 265-266 (2000) - [j36]Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
The design of the MGAP-2: a micro-grained massively parallel array. IEEE Trans. Very Large Scale Integr. Syst. 8(6): 709-716 (2000) - 1999
- [j35]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
A Fast and Simple Steiner Routing Heuristic. Discret. Appl. Math. 90(1-3): 51-67 (1999) - [j34]Benjamin Bishop, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
Aggressive Dynamic Execution of Decoded Traces. J. VLSI Signal Process. 22(1): 65-75 (1999) - 1998
- [j33]Mary Jane Irwin, Sun-Yuan Kung, Earl E. Swartzlander Jr.:
Editorial Message. J. VLSI Signal Process. 18(1): 7-8 (1998) - [j32]Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens:
A Parallel ASIC Architecture for Efficient Fractal Image Coding. J. VLSI Signal Process. 19(2): 97-113 (1998) - 1997
- [j31]Meng-Fan Chang, Mary Jane Irwin, Robert Michael Owens:
Power-Area Trade-Offs in Divided Word Line Memory Arrays. J. Circuits Syst. Comput. 7(1): 49-68 (1997) - [j30]Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens:
Motion Analysis on the Micro Grained Array Processor. Real Time Imaging 3(2): 101-110 (1997) - [j29]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
A fast algorithm for minimizing the Elmore delay to identified critical sinks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(7): 753-759 (1997) - 1996
- [j28]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
Transistor sizing for low power CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(6): 665-671 (1996) - [j27]Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
An optimal time multiplication free algorithm for edge detection on a mesh. J. VLSI Signal Process. 13(1): 67-75 (1996) - 1995
- [j26]Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin:
Digit pipelined arithmetic on fine-grain array processors. J. VLSI Signal Process. 9(3): 193-209 (1995) - 1994
- [j25]Gueesang Lee, Mary Jane Irwin, Robert Michael Owens:
Polynomial Time Testability of Circuits Generated by Input Decomposition. IEEE Trans. Computers 43(2): 201-210 (1994) - [j24]Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin:
Area Time Trade-Offs in Micro-Grain VLSI Array Architectures. IEEE Trans. Computers 43(10): 1121-1128 (1994) - [j23]TingTing Hwang, Robert Michael Owens, Mary Jane Irwin, Kuo-Hua Wang:
Logic synthesis for field-programmable gate arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(10): 1280-1287 (1994) - [j22]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
An edge-based heuristic for Steiner routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(12): 1563-1568 (1994) - [j21]Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin:
Power-delay characteristics of CMOS adders. IEEE Trans. Very Large Scale Integr. Syst. 2(3): 377-381 (1994) - 1993
- [j20]Robert Michael Owens, Thomas P. Kelliher, Mary Jane Irwin, Mohan Vishwanath, Raminder Singh Bajwa, Wen-Lin Yang:
The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. IEEE Trans. Very Large Scale Integr. Syst. 1(4): 491-502 (1993) - 1992
- [j19]Poras T. Balsara, Mary Jane Irwin:
Intermediate-level vision tasks on a memory array architecture. Mach. Vis. Appl. 6(1): 50-65 (1992) - [j18]Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin, TingTing Hwang:
ELM-A Fast Addition Algorithm Discovered by a Program. IEEE Trans. Computers 41(9): 1181-1184 (1992) - [j17]TingTing Hwang, Robert Michael Owens, Mary Jane Irwin:
Efficiently computing communication complexity for multilevel logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(5): 545-554 (1992) - 1991
- [j16]Poras T. Balsara, Robert Michael Owens, Mary Jane Irwin:
Digit Serial Multipliers. J. Parallel Distributed Comput. 11(2): 156-162 (1991) - [j15]Mary Jane Irwin, Robert Michael Owens:
A Two-Dimensional, Distributed Logic Architecture. IEEE Trans. Computers 40(10): 1094-1101 (1991) - [j14]Poras T. Balsara, Mary Jane Irwin:
Image processing on a memory array architecture. J. VLSI Signal Process. 2(4): 313-324 (1991) - 1990
- [j13]Robert Michael Owens, Mary Jane Irwin:
Being Stingy with Multipliers. IEEE Trans. Computers 39(6): 809-818 (1990) - [j12]TingTing Hwang, Robert Michael Owens, Mary Jane Irwin:
Exploiting communication complexity for multilevel logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(10): 1017-1027 (1990) - [j11]Mary Jane Irwin, Robert Michael Owens:
A case for digit serial VLSI signal processors. J. VLSI Signal Process. 1(4): 321-334 (1990) - 1988
- [j10]Mary Jane Irwin:
Special Issue on Parallelism in Computer Arithmetic. J. Parallel Distributed Comput. 5(3): 205-208 (1988) - [j9]Mary Jane Irwin:
A digit pipelined dynamic time warp processor [word recognition]. IEEE Trans. Acoust. Speech Signal Process. 36(9): 1412-1422 (1988) - 1987
- [j8]Mary Jane Irwin, Robert Michael Owens:
Digit-Pipelined Arithmetic as Illustrated By the Paste-Up System: A Tutorial. Computer 20(4): 61-73 (1987) - [j7]Robert Michael Owens, Mary Jane Irwin:
The Arithmetic Cube. IEEE Trans. Computers 36(11): 1342-1348 (1987) - [j6]Douglas S. Reeves, Mary Jane Irwin:
Fast Methods for Switch-Level Verification of MOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(5): 766-779 (1987) - [j5]Mary Jane Irwin, Robert Michael Owens:
Digit pipelined processors. J. Supercomput. 1(1): 61-86 (1987) - 1986
- [j4]Tin-Fook Ngai, Mary Jane Irwin, Shishpal Rawat:
Regular Area-Time Efficient Carry-Lookahead Adders. J. Parallel Distributed Comput. 3(1): 92-105 (1986) - [j3]Mary Jane Irwin:
Secretary/Treasurer's Report. SIGARCH Comput. Archit. News 14(4): 28 (1986) - [j2]Robert Michael Owens, Mary Jane Irwin:
A System for Designing, Simulating, and Testing High Performance VLSI Signal Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5(3): 420-428 (1986) - 1983
- [j1]Mary Jane Irwin, Robert Michael Owens:
Fully Digit On-Line Networks. IEEE Trans. Computers 32(4): 402-406 (1983)
Conference and Workshop Papers
- 2016
- [c263]Hsiang-Yun Cheng, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie:
LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches. ISCA 2016: 103-114 - [c262]Meng-Fan Chang, Ching-Hao Chuang, Yen-Ning Chiang, Shyh-Shyuan Sheu, Chia-Chen Kuo, Hsiang-Yun Cheng, John Sampson, Mary Jane Irwin:
Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell. ISCAS 2016: 1142-1145 - 2015
- [c261]Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin:
TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability. Conf. Computing Frontiers 2015: 16:1-16:8 - [c260]Hsiang-Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson, Mary Jane Irwin:
Core vs. uncore: the heart of darkness. DAC 2015: 121:1-121:6 - [c259]Mi Sun Park, Omesh Tickoo, Vijaykrishnan Narayanan, Mary Jane Irwin, Ravi Iyer:
Platform-aware dynamic configuration support for efficient text processing on heterogeneous system. DATE 2015: 1503-1508 - 2014
- [c258]Hsiang-Yun Cheng, Matthew Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie:
EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors. ISLPED 2014: 303-306 - 2013
- [c257]Wei Ding, Jun Liu, Mahmut T. Kandemir, Mary Jane Irwin:
Reshaping cache misses to improve row-buffer locality in multicore systems. PACT 2013: 235-244 - 2012
- [c256]Akbar Sharifi, Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin:
Courteous cache sharing: being nice to others in capacity management. DAC 2012: 678-687 - [c255]Hui Zhao, Ohyoung Jang, Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Mary Jane Irwin:
A hybrid NoC design for cache coherence optimization for chip multiprocessors. DAC 2012: 834-842 - [c254]Mi Sun Park, Srinidhi Kestur, Jagdish Sabarad, Vijaykrishnan Narayanan, Mary Jane Irwin:
An FPGA-based accelerator for cortical object classification. DATE 2012: 691-696 - [c253]Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Ultra Low Power Circuit Design Using Tunnel FETs. ISVLSI 2012: 153-158 - [c252]Wei Wang, Tanima Dey, Ryan W. Moore, Mahmut Aktasoglu, Bruce R. Childers, Jack W. Davidson, Mary Jane Irwin, Mahmut T. Kandemir, Mary Lou Soffa:
REEact: a customizable virtual execution manager for multicore platforms. VEE 2012: 27-38 - 2011
- [c251]Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie:
MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy. HPCA 2011: 231-242 - [c250]Hui Zhao, Mahmut T. Kandemir, Wei Ding, Mary Jane Irwin:
Exploring heterogeneous NoC design space. ICCAD 2011: 787-793 - [c249]Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin:
Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs. ISQED 2011: 495-501 - 2010
- [c248]Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan, Vijaykrishnan Narayanan, Mary Jane Irwin, Ramakrishnan Krishnan:
Optimizing power and performance for reliable on-chip networks. ASP-DAC 2010: 431-436 - [c247]Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan:
Dynamic core partitioning for energy efficiency. IPDPS Workshops 2010: 1-8 - [c246]Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin:
T-NUCA - a novel approach to non-uniform access latency cache architectures for 3D CMPs. IPDPS Workshops 2010: 1-8 - [c245]Mary Jane Irwin:
Shared caches in multicores: the good, the bad, and the ugly. ISCA 2010: 234 - [c244]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Sri Hari Krishna Narayanan:
Compiler directed network-on-chip reliability enhancement for chip multiprocessors. LCTES 2010: 85-94 - [c243]Mahmut T. Kandemir, Taylan Yemliha, Sai Prashanth Muralidhara, Shekhar Srikantaiah, Mary Jane Irwin, Yuanrui Zhang:
Cache topology aware computation mapping for multicores. PLDI 2010: 74-85 - 2009
- [c242]Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin:
Arithmetic unit design using 180nm TSV-based 3D stacking technology. 3DIC 2009: 1-4 - [c241]Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan:
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. HiPEAC 2009: 231-247 - [c240]Aditya Yanamandra, Mary Jane Irwin, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Sri Hari Krishna Narayanan:
In-Network Caching for Chip Multiprocessors. HiPEAC 2009: 373-388 - [c239]Yuan Xie, Soumya Eachempati, Aditya Yanamandra, Vijaykrishnan Narayanan, Mary Jane Irwin:
Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network. NANOARCH 2009: 51-56 - 2008
- [c238]Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin:
Adaptive set pinning: managing shared caches in chip multiprocessors. ASPLOS 2008: 135-144 - [c237]Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Analysis and solutions to issue queue process variation. DSN 2008: 11-21 - [c236]Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim:
A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398 - [c235]Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kandemir, Mustafa Karaköy, Mary Jane Irwin:
Integrated code and data placement in two-dimensional mesh based chip multiprocessors. ICCAD 2008: 583-588 - [c234]Sayaka Akioka, Feihui Li, Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin:
Ring data location prediction scheme for Non-Uniform Cache Architectures. ICCD 2008: 693-698 - [c233]Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin:
A helper thread based EDP reduction scheme for adapting application execution in CMPs. IPDPS 2008: 1-14 - [c232]Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin, Konrad Malkowski:
Managing power, performance and reliability trade-offs. IPDPS 2008: 1-5 - [c231]Aditya Yanamandra, Bryan Cover, Padma Raghavan, Mary Jane Irwin, Mahmut T. Kandemir:
Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. IPDPS 2008: 1-10 - [c230]Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu:
Hierarchical Soft Error Estimation Tool (HSEET). ISQED 2008: 680-683 - [c229]Mahmut T. Kandemir, Feihui Li, Mary Jane Irwin, Seung Woo Son:
A novel migration-based NUCA design for chip multiprocessors. SC 2008: 28 - [c228]Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin:
Implementation and evaluation of a migration-based NUCA design for chip multiprocessors. SIGMETRICS 2008: 449-450 - 2007
- [c227]Sayaka Akioka, Feihui Li, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin:
Ring Prediction for Non-Uniform Cache Architectures. PACT 2007: 401 - [c226]S. Conner, Sayaka Akioka, Mary Jane Irwin, Padma Raghavan:
Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets. IPDPS 2007: 1-8 - [c225]Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin:
Load Miss Prediction - Exploiting Power Performance Trade-offs. IPDPS 2007: 1-8 - [c224]Konrad Malkowski, Padma Raghavan, Mary Jane Irwin:
Memory Optimizations For Fast Power-Aware Sparse Computations. IPDPS 2007: 1-6 - [c223]Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin:
Phase-aware adaptive hardware selection for power-efficient scientific computations. ISLPED 2007: 403-406 - [c222]Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Variation Analysis of CAM Cells. ISQED 2007: 333-338 - [c221]Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Variation Impact on SER of Combinational Circuits. ISQED 2007: 911-916 - [c220]Andrew J. Ricketts, Madhu Mutyam, Narayanan Vijaykrishnan, Mary Jane Irwin:
Investigating Simple Low Latency Reliable Multiported Register Files. ISVLSI 2007: 375-382 - [c219]Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Architecting Microprocessor Components in 3D Design Space. VLSI Design 2007: 103-108 - [c218]Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin:
Impact of NBTI on FPGAs. VLSI Design 2007: 717-722 - 2006
- [c217]Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Object duplication for improving reliability. ASP-DAC 2006: 140-145 - [c216]Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin:
Priority scheduling in digital microfluidics-based biochips. DATE 2006: 329-334 - [c215]Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary Jane Irwin, Ibrahim Kolcu:
Activity clustering for leakage management in SPMs. DATE 2006: 696-697 - [c214]Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
On-chip bus thermal analysis and optimization. DATE 2006: 850-855 - [c213]Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris:
Characterizing the Performance and Energy Attributes of Scientific Simulations. International Conference on Computational Science (1) 2006: 242-249 - [c212]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun:
Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. ICPADS (1) 2006: 383-390 - [c211]Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin:
Enhancing L2 organization for CMPs with a center cell. IPDPS 2006 - [c210]Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin:
On improving performance and energy profiles of sparse scientific applications. IPDPS 2006 - [c209]Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin:
Conjugate gradient sparse solvers: performance-power characteristics. IPDPS 2006 - [c208]Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED 2006: 98-104 - [c207]Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Parallel Architecture for Hardware Face Detection. ISVLSI 2006: 452-453 - [c206]Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Compiler-directed thermal management for VLIW functional units. LCTES 2006: 163-172 - [c205]Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin:
Reducing NoC energy consumption through compiler-directed channel voltage scaling. PLDI 2006: 193-203 - [c204]S. Conner, Greg M. Link, S. Tobita, Mary Jane Irwin, Padma Raghavan:
Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. SC 2006: 138 - [c203]Konrad Malkowski, Padma Raghavan, Mary Jane Irwin:
Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. SC 2006: 146 - [c202]R. Rajaraman, Jungsub Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design 2006: 499-502 - 2005
- [c201]Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Designing reliable circuit in the presence of soft errors. ASP-DAC 2005: 1 - [c200]G. Chen, Mahmut T. Kandemir, Mary Jane Irwin, Gokhan Memik:
Compiler-directed selective data protection against soft errors. ASP-DAC 2005: 713-716 - [c199]Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaköy:
Customized on-chip memories for embedded chip multiprocessors. ASP-DAC 2005: 743-748 - [c198]Feihui Li, Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin:
Compiler-directed proactive power management for networks. CASES 2005: 137-146 - [c197]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression. CODES+ISSS 2005: 87-92 - [c196]Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane Irwin:
Exploring technology alternatives for nano-scale FPGA interconnects. DAC 2005: 921-926 - [c195]Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network. DATE 2005: 230-231 - [c194]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems. DATE 2005: 898-899 - [c193]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
BB-GC: Basic-Block Level Garbage Collection. DATE 2005: 1032-1037 - [c192]Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-Directed Instruction Duplication for Soft Error Detection. DATE 2005: 1056-1057 - [c191]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
Using data compression in an MPSoC architecture for improving performance. ACM Great Lakes Symposium on VLSI 2005: 353-356 - [c190]Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Three-Dimensional Cache Design Exploration Using 3DCacti. ICCD 2005: 519-524 - [c189]Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin:
Exploiting Barriers to Optimize Power Consumption of CMPs. IPDPS 2005 - [c188]Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris:
Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs. IPDPS 2005 - [c187]Guiling Wang, Mary Jane Irwin, Piotr Berman, Haoying Fu, Thomas F. La Porta:
Optimizing sensor movement planning for energy efficiency. ISLPED 2005: 215-220 - [c186]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin:
Thermal-Aware Floorplanning Using Genetic Algorithms. ISQED 2005: 634-639 - [c185]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
High Performance Array Processor for Video Decoding. ISVLSI 2005: 28-33 - [c184]Özcan Özturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun:
On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression. SoCC 2005: 175-178 - [c183]Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin:
Exploiting frequent field values in java objects for reducing heap memory requirements. VEE 2005: 68-78 - [c182]Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin:
Implementing LDPC Decoding on Network-on-Chip. VLSI Design 2005: 134-137 - [c181]Kevin M. Irick, Wei Xu, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Nanosensor Array-Based VLSI Gas Discriminator. VLSI Design 2005: 241-246 - [c180]Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. VLSI Design 2005: 374-379 - 2004
- [c179]Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reliability-Aware Co-Synthesis for Embedded Systems. ASAP 2004: 41-50 - [c178]Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Analyzing heap error behavior in embedded JVM environments. CODES+ISSS 2004: 230-235 - [c177]Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, Guangyu Chen, Mary Jane Irwin:
Data compression for improving SPM behavior. DAC 2004: 401-406 - [c176]Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
A Crosstalk Aware Interconnect with Variable Cycle Transmission. DATE 2004: 102-107 - [c175]Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin:
Scheduling Reusable Instructions for Power Reduction. DATE 2004: 148-155 - [c174]Mahmut T. Kandemir, Ozcan Ozturk, Mary Jane Irwin, Ibrahim Kolcu:
Using Data Compression to Increase Energy Savings in Multi-bank Memories. Euro-Par 2004: 310-317 - [c173]Victor De La Luz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin:
Exploring the Possibility of Operating in the Compressed Domain. Euro-Par 2004: 507-515 - [c172]Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan:
Reducing leakage energy in FPGAs using region-constrained placement. FPGA 2004: 51-58 - [c171]Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan:
A Dual-VDD Low Power FPGA Architecture. FPL 2004: 145-157 - [c170]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Ibrahim Kolcu:
Tuning data replication for improving behavior of MPSoC applications. ACM Great Lakes Symposium on VLSI 2004: 170-173 - [c169]Wei Xu, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Design of a nanosensor array architecture. ACM Great Lakes Symposium on VLSI 2004: 298-303 - [c168]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin:
Exploring Wakeup-Free Instruction Scheduling. HPCA 2004: 232-243 - [c167]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
Efficient VLSI implementation of inverse discrete cosine transform [image coding applications]. ICASSP (5) 2004: 177-180 - [c166]Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin:
Improving soft-error tolerance of FPGA configuration bits. ICCAD 2004: 107-110 - [c165]Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, Ibrahim Kolcu:
Banked scratch-pad memory management for reducing leakage energy consumption. ICCAD 2004: 120-124 - [c164]Frank Ghenassia, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing software influences on substrate noise: an ADC perspective. ICCAD 2004: 916-922 - [c163]Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharides, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. ICCD 2004: 430-437 - [c162]Eric J. Swankoski, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
A Parallel Architecture for Secure FPGA Symmetric Encryption. IPDPS 2004 - [c161]Lin Li, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Soft error and energy consumption interactions: a data cache perspective. ISLPED 2004: 132-137 - [c160]Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
The Effect of Threshold Voltages on the Soft Error Rate. ISQED 2004: 503-508 - [c159]Matthew Pirretti, Greg M. Link, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Fault Tolerant Algorithms for Network-On-Chip Interconnect. ISVLSI 2004: 46-51 - [c158]Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit:
Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI 2004: 77-82 - [c157]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Field level analysis for heap space optimization in embedded java environments. ISMM 2004: 131-142 - [c156]Hendra Saputra, Guangyu Chen, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Code protection for resource-constrained embedded devices. LCTES 2004: 240-248 - [c155]Byung-Tae Kang, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides:
Power-efficient implementation of turbo decoder in SDR system. SoCC 2004: 119-122 - [c154]Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Vamsi Srikantam:
A generic reconfigurable neural network architecture as a network on chip. SoCC 2004: 191-194 - [c153]Yuh-Fang Tsai, Ananth Hegde Ankadi, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides:
ChipPower: an architecture-level leakage simulator. SoCC 2004: 395-398 - [c152]Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Embedded Hardware Face Detection. VLSI Design 2004: 133- - [c151]M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishnan:
Designing Leakage Aware Multipliers. VLSI Design 2004: 654-657 - [c150]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
An Architecture for Motion Estimation in the Transform Domain. VLSI Design 2004: 1077-1082 - 2003
- [c149]Guilin Chen, Mahmut T. Kandemir, Hendra Saputra, Mary Jane Irwin:
Exploiting bank locality in multi-bank memories. CASES 2003: 287-297 - [c148]Wei Zhang, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin:
Performance, energy, and reliability tradeoffs in replicating hot cache lines. CASES 2003: 309-317 - [c147]Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, J. Ramanujam:
Address Register Assignment for Reducing Code Size. CC 2003: 273-289 - [c146]Ananth Hegde, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
VL-CDRAM: variable line sized cached DRAMs. CODES+ISSS 2003: 132-137 - [c145]Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mario Wolczko:
Tracking object life cycle for leakage energy optimization. CODES+ISSS 2003: 213-218 - [c144]Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Implications of technology scaling on leakage reduction techniques. DAC 2003: 187-190 - [c143]Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang:
Masking the Energy Behavior of DES Encryption. DATE 2003: 10084-10089 - [c142]Wei Zhang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De:
Compiler Support for Reducing Leakage Energy Consumption. DATE 2003: 11146-11147 - [c141]Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif:
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. DSD 2003: 41-49 - [c140]Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Adapative Error Protection for Energy Efficiency. ICCAD 2003: 2-7 - [c139]Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan:
Reducing dTLB Energy Through Dynamic Resizing. ICCD 2003: 358-363 - [c138]Amol Bhatkar, Rajarathnam Chandramouli, Narayanan Vijaykrishnan, Mary Jane Irwin:
Computation and transmission energy modeling through profiling for MPEG4 video transmission. ICME 2003: 281-284 - [c137]Sudhanva Gurumurthi, Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. IPDPS 2003: 33 - [c136]Guilin Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. IPDPS 2003: 34 - [c135]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Erik Brockmeyer, Francky Catthoor, Mary Jane Irwin:
Estimating influence of data layout optimizations on SDRAM energy consumption. ISLPED 2003: 40-43 - [c134]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John:
On load latency in low-power caches. ISLPED 2003: 258-261 - [c133]Jie S. Hu, A. Nadgir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Exploiting program hotspots and code sequentiality for instruction cache leakage management. ISLPED 2003: 402-407 - [c132]Eun Jung Kim, Ki Hwan Yum, Greg M. Link, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mazin S. Yousif, Chita R. Das:
Energy optimization techniques in cluster interconnects. ISLPED 2003: 459-464 - [c131]Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke, Narayanan Vijaykrishnan, Mary Jane Irwin:
Interplay of energy and performance for disk arrays running transaction processing workloads. ISPASS 2003: 123-132 - [c130]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. ISVLSI 2003: 127-132 - [c129]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Adapting instruction level parallelism for optimizing leakage in VLIW architectures. LCTES 2003: 275-283 - [c128]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Bernd Mathiske, Mario Wolczko:
Heap compression for memory-constrained Java environments. OOPSLA 2003: 282-301 - [c127]Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Effect of Power Optimizations on Soft Error Rate. VLSI-SoC (Selected Papers) 2003: 1-20 - [c126]Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing Soft Errors in Leakage Optimized SRAM Design. VLSI Design 2003: 227-233 - 2002
- [c125]Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam:
Leakage Energy Management in Cache Hierarchies. IEEE PACT 2002: 131-140 - [c124]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Energy savings through compression in embedded Java environments. CODES 2002: 163-168 - [c123]Victor Delaluz, Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Scheduler-based DRAM energy management. DAC 2002: 697-702 - [c122]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. DATE 2002: 436-442 - [c121]Jie S. Hu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Power-Efficient Trace Caches. DATE 2002: 1091 - [c120]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Complete Phase-Locked Loop Power Consumption Model. DATE 2002: 1108 - [c119]Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko:
Tuning Garbage Collection in an Embedded Java Environment. HPCA 2002: 92-103 - [c118]Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Tao Li, Lizy Kurian John:
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. HPCA 2002: 141-150 - [c117]Byung-Tae Kang, Vijaykrishnan Narayanan, Mary Jane Irwin, Rajarathnam Chandramouli:
Power efficient adaptive M-QAM design using adaptive pipelined analog-to-digital converter. ICASSP 2002: 2705-2708 - [c116]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim, Grant McFarland:
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes. ICCD 2002: 382-387 - [c115]Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Designing Energy-Efficient Software. IPDPS 2002 - [c114]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. ISVLSI 2002: 20-25 - [c113]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Impact of Technology Scaling in the Clock System Power. ISVLSI 2002: 59-64 - [c112]Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko:
Adaptive Garbage Collection for Battery-Operated Environments. Java Virtual Machine Research and Technology Symposium 2002: 1-12 - [c111]Hendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer:
Energy-conscious compilation based on voltage scaling. LCTES-SCOPES 2002: 2-11 - [c110]Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang:
Compiler-directed cache polymorphism. LCTES-SCOPES 2002: 165-174 - [c109]Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-directed instruction cache leakage optimization. MICRO 2002: 208-218 - [c108]David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin:
Evaluating Run-Time Techniques for Leakage Power Reduction. ASP-DAC/VLSI Design 2002: 31-38 - [c107]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu:
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. ASP-DAC/VLSI Design 2002: 288- - 2001
- [c106]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-efficient instruction cache using page-based placement. CASES 2001: 229-237 - [c105]Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh:
Dynamic Management of Scratch-Pad Memory Space. DAC 2001: 690-695 - [c104]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
DRAM Energy Management Using Software and Hardware Directed Power Mode Control. HPCA 2001: 159-169 - [c103]Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
A Framework for Energy Estimation of VLIW Architecture. ICCD 2001: 40-45 - [c102]Samarjeet Singh Tomar, Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Use of Local Memory for Efficient Java Execution. ICCD 2001: 468-476 - [c101]R. Athavale, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Influence of Array Allocation Mechanisms on Memory System Energy. IPDPS 2001: 3 - [c100]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali:
Power-aware partitioned cache architectures. ISLPED 2001: 64-67 - [c99]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin:
Energy Behavior of Java Applications from the Memory Perspective. Java Virtual Machine Research and Technology Symposium 2001: 207-220 - [c98]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam:
Morphable Cache Architectures: Potential Benefits. LCTES/OM 2001: 128-137 - [c97]Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai:
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. MICRO 2001: 102-113 - [c96]Pradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis:
SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. MSE 2001: 42-43 - [c95]Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
vEC: virtual energy counters. PASTE 2001: 28-31 - [c94]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jagannathan Ramanujam:
Morphable Cache Architectures: Potential Benefits. OM@PLDI 2001: 128-137 - [c93]Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Sudhanva Gurumurthi:
Analyzing energy behavior of spatial access methods for memory-resident data. VLDB 2001: 411-420 - [c92]David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. VLSI Design 2001: 248-253 - 2000
- [c91]Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Energy-oriented compiler optimizations for partitioned memory architectures. CASES 2000: 138-147 - [c90]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye:
Influence of compiler optimizations on system power. DAC 2000: 304-307 - [c89]Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
The design and use of simplepower: a cycle-accurate energy estimation tool. DAC 2000: 340-345 - [c88]Jeyran Hezavei, Narayanan Vijaykrishnan, Mary Jane Irwin:
A comparative study of power efficient SRAM designs. ACM Great Lakes Symposium on VLSI 2000: 117-122 - [c87]Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
SPARTA: Simulation of Physics on a Real-Time Architecture. ACM Great Lakes Symposium on VLSI 2000: 177-182 - [c86]Amisha Parikh, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Energy-Aware Instruction Scheduling. HiPC 2000: 335-344 - [c85]Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
Hardware/Software Co-design for Real-Time Physical Modeling. IEEE International Conference on Multimedia and Expo (III) 2000: 1363-1366 - [c84]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye:
Energy-driven integrated hardware-software optimizations using SimplePower. ISCA 2000: 95-106 - [c83]G. Esakkimuthu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Memory system energy (poster session): influence of hardware-software optimizations. ISLPED 2000: 244-246 - [c82]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim:
Experimental Evaluation of Energy Behavior of Iteration Space Tiling. LCPC 2000: 142-157 - [c81]Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim:
Towards Energy-Aware Iteration Space Tiling. LCTES 2000: 211-215 - [c80]Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam:
A Holistic Approach to System Level Energy Optimization. PATMOS 2000: 88-107 - 1999
- [c79]Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
The Design of a Register Renaming Unit. Great Lakes Symposium on VLSI 1999: 34-37 - [c78]Benjamin Bishop, Mary Jane Irwin:
Databus charge recovery: practical considerations. ISLPED 1999: 85-87 - 1998
- [c77]Rita Yu Chen, Robert Michael Owens, Mary Jane Irwin, Raminder Singh Bajwa:
Validation of an Architectural Level Power Analysis Technique. DAC 1998: 242-245 - [c76]John R. Sacha, Mary Jane Irwin:
Number representations for reducing switched capacitance in subband coding. ICASSP 1998: 3125-3128 - [c75]Benjamin Bishop, Robert Michael Owens, Mary Jane Irwin:
Aggressive Dynamic Execution of Multimedia Kernel Traces. IPPS/SPDP 1998: 640-646 - [c74]John R. Sacha, Mary Jane Irwin:
The logarithmic number system for strength reduction in adaptive filtering. ISLPED 1998: 256-261 - 1997
- [c73]Kevin P. Acken, Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
The MGAP Family of Processor Arrays. Great Lakes Symposium on VLSI 1997: 105- - [c72]Eric Gayles, Kevin P. Acken, Robert Michael Owens, Mary Jane Irwin:
A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines. Great Lakes Symposium on VLSI 1997: 182- - [c71]Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin:
Mixed-autonomy local interconnect for reconfigurable SIMD arrays. HiPC 1997: 428-431 - [c70]Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin, Rita Yu Chen, Debashree Ghosh:
Techniques for low energy software. ISLPED 1997: 72-75 - [c69]Atul Kalambur, Mary Jane Irwin:
An extended addressing mode for low power. ISLPED 1997: 208-213 - [c68]Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin:
A Simulation Methodology for Software Energy Evaluation. VLSI Design 1997: 509-510 - 1996
- [c67]Kevin P. Acken, Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens:
An Architectural Design For Parallel Fractal Compression. ASAP 1996: 3-11 - [c66]Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens, Amulya K. Garga:
Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline. ASAP 1996: 65-71 - [c65]Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin:
Energy Characterization based on Clustering. DAC 1996: 702-707 - [c64]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
Recent Developments in Performance Driven Steiner Routing: An Overview. Great Lakes Symposium on VLSI 1996: 137-142 - [c63]Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin:
Some Issues in Gray Code Addressing. Great Lakes Symposium on VLSI 1996: 178-181 - [c62]Chetana Nagendra, Mary Jane Irwin:
Design tradeoffs in CMOS FIR filters. ICASSP 1996: 3260-3263 - [c61]Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin:
Instruction level power profiling. ICASSP 1996: 3326-3329 - [c60]Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens:
Power comparisons for barrel shifters. ISLPED 1996: 209-212 - [c59]Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin:
Design tradeoffs in high speed multipliers and FIR filters. VLSI Design 1996: 29-32 - 1995
- [c58]Robert Michael Owens, Raminder Singh Bajwa, Mary Jane Irwin:
Reducing the number of counters needed for integer multiplication. IEEE Symposium on Computer Arithmetic 1995: 38-41 - [c57]Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin:
The MGAP's programming environment and the *C++ language. ASAP 1995: 121-124 - [c56]Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens:
Motion Estimation Algorithms on Fine Grain Array Processor. ASAP 1995: 204-213 - [c55]Huzefa Mehta, Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
Accurate Estimation of Combinational Circuit Activity. DAC 1995: 618-622 - [c54]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
Fast algorithm for performance-oriented Steiner routing. Great Lakes Symposium on VLSI 1995: 198-203 - [c53]Thomas P. Kelliher, Eric Gayles, Robert Michael Owens, Mary Jane Irwin:
The MGAP-2: an advanced, massively parallel VLSI signal processor. ICASSP 1995: 3219-3222 - [c52]Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin:
Unifying carry-sum and signed-digital number representations for low power. ISLPD 1995: 15-20 - [c51]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
High-throughput and low-power DSP using clocked-CMOS circuitry. ISLPD 1995: 139-144 - [c50]Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint. ISLPD 1995: 167-172 - [c49]Paul Keltcher, Robert Michael Owens, Mary Jane Irwin:
A simulation methodology for evaluating parallel computers. SPDP 1995: 478-481 - [c48]Manjit Borah, Mary Jane Irwin, Robert Michael Owens:
Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering. VLSI Design 1995: 294-298 - 1994
- [c47]Raminder Singh Bajwa, Chetana N. Keltcher, Paul Keltcher, Mary Jane Irwin:
Rapid prototyping with programmable control paths. ASAP 1994: 69-74 - [c46]Manjit Borah, Raminder Singh Bajwa, Sridhar Hannenhalli, Mary Jane Irwin:
A SIMD solution to the sequence comparison problem on the MGAP. ASAP 1994: 336-345 - [c45]Wen-Lin Yang, Robert Michael Owens, Mary Jane Irwin:
FPGA-based synthesis of FSMs through decomposition. Great Lakes Symposium on VLSI 1994: 97-100 - [c44]Manjit Borah, Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin:
The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS. HICSS (1) 1994: 96-104 - [c43]Chetana Nagendra, Mary Jane Irwin, Robert Michael Owens:
Digit pipelined discrete wavelet transform. ICASSP (2) 1994: 405-408 - [c42]Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens, Chen-Mi Wu:
Dynamic Space Warping Algorithms on Fine-Graln Array Processors. IPPS 1994: 921-925 - 1993
- [c41]Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin:
Digit systolic algorithms for fine-grain architectures. ASAP 1993: 466-477 - [c40]Cheng-Liang Ding, Ching-Yen Ho, Mary Jane Irwin:
A new optimization driven clustering algorithm for large circuits. EURO-DAC 1993: 28-32 - [c39]Wen-Lin Yang, Robert Michael Owens, Mary Jane Irwin:
Multi-way FSM decomposition based on interconnect complexity. EURO-DAC 1993: 390-395 - [c38]Chen-Mi Wu, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
A new blocked IIR algorithm. ICASSP (3) 1993: 113-116 - [c37]Thomas P. Kelliher, Mary Jane Irwin:
A systolic VLSI architecture for multi-dimensional transforms. ICASSP (1) 1993: 365-368 - [c36]Chetana Nagendra, Manjit Borah, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
Edge detection using fine-grained parallelism in VLSI. ICASSP (1) 1993: 401-404 - [c35]Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin:
Image Processing with the MGAP: A Cost Effective Solution. IPPS 1993: 439-443 - [c34]Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin:
A Massively Parallel, Micro-Grained VLSI Architecture. VLSI Design 1993: 250-255 - 1992
- [c33]Robert Michael Owens, Mary Jane Irwin, Thomas P. Kelliher, Mohan Vishwanath, Raminder Singh Bajwa:
Implementing a family of high performance, micrograined architectures. ASAP 1992: 191-205 - [c32]Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
Discrete wavelet transforms in VLSI. ASAP 1992: 218-229 - [c31]Soohong Kim, Robert Michael Owens, Mary Jane Irwin:
Experiments with a Performance Driven Module Generator. DAC 1992: 687-690 - [c30]Soohong Kim, Robert Michael Owens, Mary Jane Irwin:
PERFLEX: a performance driven module generator. EURO-DAC 1992: 154-159 - [c29]Mary Jane Irwin, Robert Michael Owens:
A micro-grained VLSI signal processor. ICASSP 1992: 641-644 - [c28]Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
ECube: An Efficient Architecture for Analyzing Time-Varying Spectra. VLSI Design 1992: 221-226 - 1991
- [c27]Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
The Arithmetic Cube: error analysis and simulation. ASAP 1991: 129-143 - [c26]Mary Jane Irwin, Robert Michael Owens, Thomas P. Kelliher, Kin-Ki Leung, Mohan Vishwanath:
The arithmetic cube II: a second generation VLSI DSP processor. ICASSP 1991: 1125-1128 - 1990
- [c25]Chen-Mie Wu, Robert Michael Owens, Mary Jane Irwin:
Mapping high-dimension wavefront computations to silicon. ASAP 1990: 78-89 - [c24]Mary Jane Irwin, Robert Michael Owens:
A two-dimensional, distributed logic processor for machine vision. ICASSP 1990: 945-948 - [c23]Chen-Mi Wu, Robert Michael Owens, Mary Jane Irwin:
Distortion processing in image matching problems. ICASSP 1990: 2181-2184 - [c22]Gueesang Lee, Mary Jane Irwin, Robert Michael Owens:
Test generation in circuits constructed by input decomposition. ICCD 1990: 107-111 - [c21]TingTing Hwang, Robert Michael Owens, Mary Jane Irwin:
Logic synthesis for programmable logic devices. ICCD 1990: 364-367 - [c20]Barry M. Pangrle, Pao-Po Hou, Robert Michael Owens, Mary Jane Irwin:
An integrated, multi-level synthesis system. RSP 1990: 167-175 - 1989
- [c19]TingTing Hwang, Robert Michael Owens, Mary Jane Irwin:
Multi-Level Logic Synthesis Using Communication Complexity. DAC 1989: 215-220 - [c18]Mary Jane Irwin, Robert Michael Owens:
A Comparison of Four Two-dimensional Gate Matrix Layout Tools. DAC 1989: 698-701 - [c17]Robert Michael Owens, Mary Jane Irwin:
Implementing algorithms for convolution on arrays of adders. ICASSP 1989: 1127-1130 - [c16]Tsang-Ling Sheu, Woei Lin, Chita R. Das, Mary Jane Irwin:
Distributed Fault Diagnosis in the Butterfly Parallel Processor. ICPP (1) 1989: 172-175 - 1988
- [c15]Pao-Po Hou, Robert Michael Owens, Mary Jane Irwin:
DECOMPOSER: A Synthesizer for Systolic Systems. DAC 1988: 650-653 - [c14]Robert Michael Owens, Mary Jane Irwin:
Multidimensional algorithms for VLSI processors. ICASSP 1988: 749-752 - [c13]Mary Jane Irwin, Robert Michael Owens:
A comparison of two digit serial VLSI adders. ICCD 1988: 227-229 - 1987
- [c12]Jared A. Beekman, Robert Michael Owens, Mary Jane Irwin:
Mesh Arrays and LOGICIAN: A Tool for Their Efficient Generation. DAC 1987: 357-362 - [c11]Robert Michael Owens, Mary Jane Irwin:
An Overview of the Penn State Design System. DAC 1987: 516-522 - 1986
- [c10]Shishpal Rawat, Poras T. Balsara, Mary Jane Irwin, Tom Mackowiak:
Design and implementation of real time video processor. ICASSP 1986: 2215-2218 - 1985
- [c9]Tin-Fook Ngai, Mary Jane Irwin:
Regular, area-time efficient carry-lookahead adders. IEEE Symposium on Computer Arithmetic 1985: 9-15 - 1983
- [c8]Robert Michael Owens, Mary Jane Irwin:
Numerical limitations on the design of digit online networks. IEEE Symposium on Computer Arithmetic 1983: 156-161 - 1982
- [c7]Bryan Gerard Mackay, Mary Jane Irwin:
A digit online arithmetic simulator. ICPP 1982: 304-306 - 1981
- [c6]Mary Jane Irwin, Dwight R. Smith:
A rational arithmetic processor. IEEE Symposium on Computer Arithmetic 1981: 241-244 - 1980
- [c5]Mary Jane Irwin:
Reduction of broadband noise in speech by spectral weighting. ICASSP 1980: 1045-1051 - [c4]Mary Jane Irwin, Don Heller:
Online Pipeline Systems for Recursive Numeric Computations. ISCA 1980: 292-299 - 1979
- [c3]Robert Michael Owens, Mary Jane Irwin:
On-Line Algorithms for the Design of Pipeline Architectures. ISCA 1979: 12-19 - 1978
- [c2]Mary Jane Irwin:
Reconfigurable Pipeline Systems. ACM Annual Conference (1) 1978: 86-92 - [c1]Mary Jane Irwin:
A Pipelined Processing Unit for On-Line Division. ISCA 1978: 24-30
Parts in Books or Collections
- 2004
- [p1]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Ibrahim Kolcu:
Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations. Ultra Low-Power Electronics and Design 2004: 123-140
Editorship
- 2009
- [e8]Mary Lou Soffa, Mary Jane Irwin:
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009. ACM 2009, ISBN 978-1-60558-406-5 [contents] - 2006
- [e7]Mary Jane Irwin, Koen De Bosschere:
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006. ACM 2006, ISBN 1-59593-362-X [contents] - 2004
- [e6]Mary Jane Irwin, Wei Zhao, Luciano Lavagno, Scott A. Mahlke:
Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004. ACM 2004, ISBN 1-58113-890-3 [contents] - 2002
- [e5]Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet:
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002. ACM 2002, ISBN 1-58113-475-4 [contents] - 2001
- [e4]Enrico Macii, Vivek De, Mary Jane Irwin:
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001. ACM 2001, ISBN 1-58113-371-5 [contents] - 1999
- [e3]Mary Jane Irwin:
Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999. ACM Press 1999 [contents] - 1993
- [e2]Earl E. Swartzlander Jr., Mary Jane Irwin, Graham A. Jullien:
11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings. IEEE Computer Society/ 1993, ISBN 0-8186-3862-1 [contents] - 1987
- [e1]Mary Jane Irwin, Renato Stefanelli:
8th IEEE Symposium on Computer Arithmetic, ARITH 1987, Como, Italy, May 18-21, 1987. IEEE Computer Society 1987, ISBN 0-8186-0774-2 [contents]
Informal and Other Publications
- 2016
- [i3]Mark D. Hill, Sarita V. Adve, Luis Ceze, Mary Jane Irwin, David R. Kaeli, Margaret Martonosi, Josep Torrellas, Thomas F. Wenisch, David A. Wood, Katherine A. Yelick:
21st Century Computer Architecture. CoRR abs/1609.06756 (2016) - 2007
- [i2]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems. CoRR abs/0710.4660 (2007) - [i1]Yuh-Fang Tsai, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network. CoRR abs/0710.4731 (2007)
Coauthor Index
[j93] [j88] [j86] [j85] [j84] [j83] [j81] [j77] [j74] [j70] [j69] [j65] [j63] [j62] [j61] [j60] [j59] [j58] [j57] [j56] [j55] [j54] [j52] [j51] [j49] [j48] [j47] [j46] [j45] [j43] [j42] [j39] [j38] [c261] [c258] [c257] [c256] [c255] [c252] [c251] [c250] [c249] [c247] [c246] [c244] [c243] [c241] [c240] [c238] [c235] [c234] [c233] [c232] [c231] [c229] [c228] [c227] [c223] [c217] [c215] [c212] [c211] [c206] [c205] [c200] [c199] [c198] [c197] [c194] [c193] [c192] [c191] [c189] [c184] [c183] [c179] [c178] [c177] [c176] [c175] [c174] [c173] [c172] [c171] [c170] [c166] [c165] [c162] [c161] [c159] [c157] [c156] [c149] [c148] [c147] [c146] [c145] [c143] [c142] [c141] [c140] [c139] [c137] [c136] [c135] [c133] [c132] [c131] [c130] [c129] [c128] [c125] [c124] [c123] [c122] [c121] [c119] [c118] [c115] [c114] [c112] [c111] [c110] [c109] [c107] [c106] [c105] [c104] [c103] [c102] [c101] [c100] [c99] [c98] [c97] [c95] [c94] [c93] [c92] [c91] [c90] [c89] [c86] [c84] [c83] [c82] [c81] [c80] [p1] [i2]
Chetana N. Keltcher
aka: Chetana Nagendra
aka: Chetana Nagendra
[j36] [j35] [j34] [j32] [j31] [j30] [j29] [j28] [j27] [j26] [j25] [j24] [j23] [j22] [j21] [j20] [j18] [j17] [j16] [j15] [j13] [j12] [j11] [j8] [j7] [j5] [j2] [j1] [c77] [c75] [c73] [c72] [c71] [c70] [c68] [c67] [c66] [c65] [c64] [c63] [c61] [c60] [c59] [c58] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [c48] [c45] [c44] [c43] [c42] [c41] [c39] [c38] [c36] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c15] [c14] [c13] [c12] [c11] [c8] [c3]
Theocharis Theocharides
aka: Theo Theocharides
aka: Theo Theocharides
Narayanan Vijaykrishnan
aka: Vijaykrishnan Narayanan
aka: Vijaykrishnan Narayanan
[j91] [j87] [j86] [j84] [j82] [j81] [j80] [j79] [j77] [j76] [j75] [j74] [j72] [j71] [j70] [j68] [j67] [j66] [j65] [j64] [j63] [j62] [j61] [j60] [j58] [j57] [j56] [j55] [j54] [j53] [j52] [j51] [j49] [j48] [j47] [j46] [j45] [j44] [j43] [j42] [j40] [j39] [j38] [c259] [c254] [c253] [c248] [c240] [c239] [c237] [c236] [c230] [c222] [c221] [c220] [c219] [c218] [c217] [c216] [c214] [c208] [c207] [c206] [c202] [c201] [c196] [c195] [c194] [c192] [c190] [c186] [c185] [c182] [c181] [c180] [c179] [c178] [c176] [c175] [c172] [c171] [c169] [c168] [c167] [c166] [c164] [c163] [c162] [c161] [c160] [c159] [c158] [c157] [c156] [c155] [c154] [c153] [c152] [c151] [c150] [c146] [c145] [c144] [c143] [c142] [c141] [c140] [c139] [c138] [c137] [c136] [c135] [c134] [c133] [c132] [c131] [c130] [c129] [c128] [c127] [c126] [c125] [c124] [c123] [c122] [c121] [c120] [c119] [c118] [c117] [c116] [c115] [c114] [c113] [c112] [c111] [c110] [c109] [c108] [c107] [c106] [c105] [c104] [c103] [c102] [c101] [c100] [c99] [c98] [c97] [c96] [c95] [c94] [c93] [c92] [c91] [c90] [c89] [c88] [c86] [c84] [c83] [c82] [c81] [c80] [p1] [i2] [i1]
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