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"Power-aware partitioned cache architectures."
Soontae Kim et al. (2001)
- Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali:
Power-aware partitioned cache architectures. ISLPED 2001: 64-67
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