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"Transistor sizing for minimizing power consumption of CMOS circuits under ..."

Manjit Borah, Robert Michael Owens, Mary Jane Irwin (1995)

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DOI: 10.1145/224081.224111

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/islped/BorahOI95a
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Manjit Borah, Robert Michael Owens, Mary Jane Irwin:
Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint. ISLPD 1995: 167-172

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