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ORCIDEduardo A. C. da Costa
Eduardo Antonio Cesar da Costa – Eduardo Antônio César da Costa – Eduardo Costa 0001
Person information
- affiliation: Federal University of Pelotas, Brazil
Other persons with the same name
- Eduardo Costa 0002 — Globo TV Network, Rio de Janeiro, Brazil
- Eduardo Costa 0003
![[0000-0003-1411-5338]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-1411-5338")
— Corteva Agriscience™, Mogi Mirim, Sao Paulo, Brazil
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Journal Articles
- 2024
[j32]Morgana M. A. da Rosa, Guilherme Paim, Eduardo A. C. da Costa, Rafael Soares, Sergio Bampi:
AxRSU-2m: Higher-Order m-Bit Approximate Encoders for Radix-2m Squarer Units. Circuits Syst. Signal Process. 43(6): 3649-3678 (2024)- [j31]Morgana Macedo Azevedo da Rosa, Patrícia Ücker Leleu da Costa, Eduardo Antonio Cesar da Costa, Rafael Iankowski Soares, Sergio Bampi:
VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 1000-1013 (2024) - 2023
- [j30]Morgana M. A. da Rosa, Eduardo A. C. da Costa, Leandro Mateus Giacomini Rocha, Guilherme Paim, Sergio Bampi:
Energy-Efficient VLSI Squarer Unit with Optimized Radix-2m Multiplication Logic. Circuits Syst. Signal Process. 42(2): 828-852 (2023) - [j29]Pedro Tauã Lopes Pereira, Guilherme Paim, Eduardo Antônio César da Costa, Sérgio Jose Melo de Almeida, Sergio Bampi:
ReAdapt: A Reconfigurable Datapath for Runtime Energy-Quality Scalable Adaptive Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 327-339 (2023) - [j28]Gerson D. Andrade, Matheus Silva, Cínthia Schneider, Guilherme Paim, Sergio Bampi, Eduardo Costa, Alexandra L. Zimpeck:
Robustness Analysis of 3-2 Adder Compressor Designed in 7-nm FinFET Technology. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1264-1268 (2023) - [j27]Morgana Macedo Azevedo da Rosa, Guilherme Paim, Patrícia Ücker Leleu da Costa, Eduardo Antonio Cesar da Costa, Rafael Iankowski Soares, Sergio Bampi:
AxPPA: Approximate Parallel Prefix Adders. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 17-28 (2023) - 2022
- [j26]Bianca Silveira, Guilherme Paim, Brunno Alves Abreu, Rafael dos Santos Ferreira, Cláudio Machado Diniz, Eduardo Antônio César da Costa, Sergio Bampi:
The 4-2 Fused Adder-Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures. Circuits Syst. Signal Process. 41(3): 1577-1595 (2022) - [j25]Guilherme Paim, Hussam Amrouch, Leandro M. G. Rocha, Brunno Abreu, Eduardo Antônio César da Costa, Sergio Bampi, Jörg Henkel:
A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers. IEEE Trans. Computers 71(2): 349-363 (2022) - [j24]Pedro Tauã Lopes Pereira, Patrícia Ücker Leleu da Costa, Guilherme da Costa Ferreira, Brunno Alves de Abreu, Guilherme Paim, Eduardo Antônio César da Costa, Sergio Bampi:
Energy-Quality Scalable Design Space Exploration of Approximate FFT Hardware Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4524-4534 (2022) - [j23]Guilherme Paim, Hussam Amrouch, Eduardo Antônio César da Costa, Sergio Bampi, Jörg Henkel:
Bridging the Gap Between Voltage Over-Scaling and Joint Hardware Accelerator-Algorithm Closed-Loop. IEEE Trans. Circuits Syst. Video Technol. 32(1): 398-410 (2022) - 2021
- [j22]Andrei La Rosa, Pedro Tauã Lopes Pereira, Patrícia Ücker, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi, Sérgio Almeida:
Exploring NLMS-Based Adaptive Filter Hardware Architectures for Eliminating Power Line Interference in EEG Signals. Circuits Syst. Signal Process. 40(7): 3305-3337 (2021) - [j21]Guilherme da Costa Ferreira, Guilherme Paim, Leandro M. G. Rocha, Gustavo M. Santana, Renato H. Neuenfeld, Eduardo A. C. da Costa, Sergio Bampi:
Low-power fast Fourier transform hardware architecture combining a split-radix butterfly and efficient adder compressors. IET Comput. Digit. Tech. 15(3): 230-240 (2021) - [j20]Patrícia Ücker Leleu da Costa, Guilherme Paim, Leandro Mateus Giacomini Rocha, Eduardo Antônio César da Costa, Sérgio Jose Melo de Almeida, Sergio Bampi:
Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing. IEEE Trans. Biomed. Circuits Syst. 15(5): 898-911 (2021) - [j19]Guilherme Paim, Georgios Zervakis, Girish Pahwa, Yogesh Singh Chauhan, Eduardo Antonio Cesar da Costa, Sergio Bampi, Jörg Henkel, Hussam Amrouch:
On the Resiliency of NCFET Circuits Against Voltage Over-Scaling. IEEE Trans. Circuits Syst. I Regul. Pap. 68(4): 1481-1492 (2021) - [j18]Henrique Seidel, Morgana Macedo Azevedo da Rosa, Guilherme Paim, Eduardo Antônio César da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Approximate Pruned and Truncated Haar Discrete Wavelet Transform VLSI Hardware for Energy-Efficient ECG Signal Processing. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1814-1826 (2021) - [j17]Morgana Macedo Azevedo da Rosa, Henrique Seidel, Guilherme Paim, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
An Energy-Efficient Haar Wavelet Transform Architecture for Respiratory Signal Processing. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 597-601 (2021) - [j16]Pedro Tauã Lopes Pereira, Guilherme Paim, Patrícia Ücker Leleu da Costa, Eduardo Antônio César da Costa, Sérgio Jose Melo de Almeida, Sergio Bampi:
Architectural Exploration for Energy-Efficient Fixed-Point Kalman Filter VLSI Design. IEEE Trans. Very Large Scale Integr. Syst. 29(7): 1402-1415 (2021) - 2020
- [j15]Vagner Guidotti, Guilherme Paim, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Power-Efficient Approximate Newton-Raphson Integer Divider Applied to NLMS Adaptive Filter for High-Quality Interference Cancelling. Circuits Syst. Signal Process. 39(11): 5729-5757 (2020) - [j14]Leonardo Bandeira Soares, Julio F. R. Oliveira, Eduardo Antonio Cesar da Costa, Sergio Bampi:
An Energy-Efficient and Approximate Accelerator Design for Real-Time Canny Edge Detection. Circuits Syst. Signal Process. 39(12): 6098-6120 (2020) - [j13]Guilherme Paim, Gustavo M. Santana, Brunno A. Abreu, Leandro M. G. Rocha, Mateus Grellert, Eduardo A. C. da Costa, Sergio Bampi:
Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding. J. Real Time Image Process. 17(5): 1735-1754 (2020) - [j12]Guilherme Paim, Leandro Mateus Giacomini Rocha, Hussam Amrouch, Eduardo Antônio César da Costa, Sergio Bampi, Jörg Henkel:
A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders. IEEE Trans. Circuits Syst. Video Technol. 30(10): 3814-3828 (2020) - 2019
- [j11]Gustavo Ott, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Mateus Beck Fonseca:
IIR Filter Architectures with Truncation Error Feedback for ECG Signal Processing. Circuits Syst. Signal Process. 38(1): 329-355 (2019) - [j10]Guilherme Paim, Leandro Mateus Giacomini Rocha, Gustavo Madeira Santana, Leonardo Bandeira Soares, Eduardo Antonio Cesar da Costa, Sergio Bampi:
Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 680-693 (2019) - [j9]Leonardo Bandeira Soares, Morgana Macedo Azevedo da Rosa, Cláudio Machado Diniz, Eduardo Antonio Cesar da Costa, Sergio Bampi:
Design Methodology to Explore Hybrid Approximate Adders for Energy-Efficient Image and Video Processing Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2137-2150 (2019) - 2017
- [j8]Bianca Silveira, Guilherme Paim, Brunno Abreu, Mateus Grellert, Cláudio Machado Diniz, Eduardo A. C. da Costa, Sergio Bampi:
Power-Efficient Sum of Absolute Differences Hardware Architecture Using Adder Compressors for Integer Motion Estimation Design. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(12): 3126-3137 (2017) - 2013
- [j7]Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro:
Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 498-511 (2013) - 2012
- [j6]Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro:
High-level algorithms for the optimization of gate-level area in digit-serial multiple constant multiplications. Integr. 45(3): 294-306 (2012) - [j5]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Optimization Algorithms for the Multiplierless Realization of Linear Transforms. ACM Trans. Design Autom. Electr. Syst. 17(1): 3:1-3:27 (2012) - 2011
- [j4]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Finding the optimal tradeoff between area and delay in multiple constant multiplications. Microprocess. Microsystems 35(8): 729-741 (2011) - 2010
- [j3]Leandro Zafalon Pieper, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi, José C. Monteiro:
Efficient Dedicated Multiplication Blocks for 2's Complement Radix-2m Array Multipliers. J. Comput. 5(10): 1502-1509 (2010) - 2008
- [j2]Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6): 1013-1026 (2008) - 2007
- [j1]Eduardo A. C. da Costa, José Monteiro, Sergio Bampi:
A new array architecture for signed multiplication using Gray encoded radix-2m operands. Integr. 40(2): 118-132 (2007)
Conference and Workshop Papers
- 2024
- [c121]Cristiano Santos, Leandro Tavares, Eduardo A. C. da Costa, Gustavo Rehbein, Guilherme Corrêa, Marcelo Schiavon Porto:
Coding Efficiency and Complexity Analysis of the Geometry-based Point Cloud Encoder. LASCAS 2024: 1-5 - 2023
- [c120]Pedro Tauã Lopes Pereira, Guilherme Paim, Paulo F. Flores, Eduardo A. C. da Costa, Sergio Bampi:
AxASRE: A Novel Approach to Approximate Adder Synthesis Results Estimation. DSN-W 2023: 183-186 - [c119]Arthur Cardozo, Morgana M. A. da Rosa, Rafael Soares, Eduardo Costa, Sergio Bampi:
An Ultra Low-Energy VLSI Approximate Discrete Haar Wavelet Transform for ECG Data Compression. ICECS 2023: 1-4 - [c118]Patrícia U. L. da Costa, Morgana M. A. da Rosa, Rafael Soares, Eduardo A. C. da Costa, Sergio Bampi:
An Optimized VLSI Exponential Unit Design Exploring Efficient Arithmetic Operation Strategies. ICECS 2023: 1-4 - [c117]Rodrigo Lopes, Leonardo Antonietti, Morgana M. A. da Rosa, Eduardo Costa, Rafael Soares, Sergio Bampi:
New Energy-Efficient 3-2 and 4-2 Approximate Adder Compressors Topologies. ICECS 2023: 1-4 - [c116]Morgana M. A. da Rosa, Eduardo Costa, Rafael Soares, Sergio Bampi:
Accuracy-, Delay- and Area-Driven Evaluation of Lower-Part Approximate Parallel Prefix Adder. ICECS 2023: 1-4 - [c115]Morgana M. A. da Rosa, Patrícia U. L. da Costa, Guilherme Paim, Eduardo A. C. da Costa, Rafael Soares, Sergio Bampi:
An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units. LASCAS 2023: 1-4 - [c114]Pedro Tauã Lopes Pereira, Guilherme Paim, Eduardo A. C. da Costa, Paulo F. Flores, Sergio Bampi:
Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI Design. NEWCAS 2023: 1-5 - [c113]Morgana Macedo Azevedo da Rosa, Eduardo A. C. da Costa, Rafael Iankowski Soares, Sergio Bampi:
Exploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing. NEWCAS 2023: 1-5 - 2022
- [c112]Patrícia U. L. da Costa, Morgana M. A. da Rosa, Guilherme Paim, Eduardo Antonio Cesar da Costa, Rafael Soares, Sergio Bampi:
An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators. ICECS 2022 2022: 1-4 - [c111]Pedro Tauã Lopes Pereira, Guilherme Paim, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Exploring Approximate Arithmetic Units for a Power-Efficient Kalman Gain VLSI Design. ICECS 2022 2022: 1-4 - [c110]Morgana Macedo Azevedo da Rosa, Guilherme Paim, Rafael Soares, Eduardo A. C. da Costa, Sergio Bampi:
Discrete Haar Wavelet Transform Hardware Design for Energy-Efficient Image Watermarking. ICECS 2022 2022: 1-4 - [c109]Morgana Macedo Azevedo da Rosa, Guilherme Paim, Jorge Castro-Godínez, Eduardo A. C. da Costa, Rafael Iankowski Soares, Sergio Bampi:
AxRSU: Approximate Radix-4 Squarer Unit. ISCAS 2022: 1655-1659 - [c108]Patrícia U. L. da Costa, Pedro Tauã Lopes Pereira, Brunno A. Abreu, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
Improved Approximate Multipliers for Single-Precision Floating-Point Hardware Design. LASCAS 2022: 1-4 - 2021
- [c107]Gerson D. Andrade, Ricardo A. L. Reis, Eduardo A. C. da Costa, Alexandra L. Zimpeck:
Sensitivity of FinFET Adders to PVT Variations and Sleep Transistor as a Mitigation Strategy. APCCAS 2021: 37-40 - [c106]Patrícia U. L. da Costa, Pedro Tauã Lopes Pereira, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations. ICECS 2021: 1-4 - [c105]Guilherme da Costa Ferreira, Pedro Tauã Lopes Pereira, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders. LASCAS 2021: 1-4 - [c104]Pedro Tauã Lopes Pereira, Guilherme Paim, Guilherme da Costa Ferreira, Eduardo A. C. da Costa, Sérgio Almeida, Sergio Bampi:
Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures. LASCAS 2021: 1-4 - 2020
- [c103]Patrícia U. L. da Costa, Guilherme Paim, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sérgio Almeida, Sergio Bampi:
An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing. ICECS 2020: 1-4 - [c102]Morgana M. A. da Rosa, Guilherme Paim, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi:
The Radix-2m Squared Multiplier. ICECS 2020: 1-4 - [c101]Morgana M. A. da Rosa, Guilherme Paim, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi:
Exploring Efficient Adder Compressors for Power-Efficient Sum of Squared Differences Design. ICECS 2020: 1-4 - [c100]Andrei La Rosa, Patrícia Ücker, Guilherme Paim, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Exploring NLMS and IPNLMS Adaptive Filtering VLSI Hardware Architectures for Robust EEG Signal Artifacts Elimination. ICECS 2020: 1-4 - [c99]Thomas V. Fontanari, Guilherme Paim, Leandro M. G. Rocha, Patrícia Ücker, Eduardo A. C. da Costa, Sergio Bampi:
An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay. LASCAS 2020: 1-4 - [c98]Henrique Seidel, Morgana Macedo Azevedo da Rosa, Guilherme Paim, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Energy-Efficient Haar Transform Architectures Using Efficient Addition Schemes. LASCAS 2020: 1-4 - [c97]Patrícia Ücker, Miguel R. Weirich, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design. LASCAS 2020: 1-4 - [c96]Guilherme da Costa Ferreira, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi:
Combining m=2 Multipliers and Adder Compressors for Power Efficient Radix-4 Butterfly. MWSCAS 2020: 1080-1083 - [c95]Mateus Terribele Leme, Guilherme Paim, Leandro M. G. Rocha, Patrícia Ücker, Vitor G. Lima, Rafael Soares, Eduardo A. C. da Costa, Sergio Bampi:
Optimizing the Montgomery Modular Multiplier for a Power- and Area-Efficient Hardware Architecture. MWSCAS 2020: 1084-1087 - [c94]Leandro M. G. Rocha, Morgana Macedo, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
Improving the Partial Product Tree Compression on Signed Radix-2m Parallel Multipliers. NEWCAS 2020: 182-185 - 2019
- [c93]Pedro Tauã Lopes Pereira, Guilherme Paim, Patrícia Ücker, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Exploring Architectural Solutions for an Energy-Efficient Kalman Filter Gain Realization. ICECS 2019: 650-653 - [c92]Leonardo Bandeira Soares, Eduardo Antônio César da Costa, Sergio Bampi:
A Configurable Pruning Gaussian Image Filter for Energy-Efficient Edge Detection. ICECS 2019: 666-669 - [c91]Vitor G. Lima, Guilherme Paim, Leandro M. G. Rocha, Leomar S. da Rosa Jr., Felipe S. Marques, Eduardo A. C. da Costa, Vinicius V. Camargo, Rafael Soares, Sergio Bampi:
Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing. ISCAS 2019: 1-5 - [c90]Rafael S. Ferreira, Guilherme Paim, Brunno A. Abreu, Cláudio Machado Diniz, Eduardo A. C. da Costa, Sergio Bampi:
HEVC Interpolation Filter Architecture Using Hybrid Encoding Arithmetic Operators. MWSCAS 2019: 331-334 - [c89]Brunno Abreu, Mateus Grellert, Guilherme Paim, Thomas V. Fontanari, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi:
Exploring Motion Vector Cost with Partial Distortion Elimination in Sum of Absolute Differences for HEVC Integer Motion Estimation. NEWCAS 2019: 1-4 - [c88]Guilherme Paim, Leandro M. G. Rocha, Eduardo Antônio César da Costa, Sergio Bampi:
Maximizing the Power-Efficiency of the Approximate Pruned Modified Rounded DCT Exploiting Approximate Adder Compressors. NEWCAS 2019: 1-4 - 2018
- [c87]Leonardo Bandeira Soares, Morgana M. A. da Rosa, Cláudio Machado Diniz, Eduardo A. C. da Costa, Sergio Bampi:
Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filtering. LASCAS 2018: 1-4 - [c86]Luis F. Sequeira, Gustavo M. Santana, Guilherme Paim, Leandro M. G. Rocha, Brunno Abreu, Eduardo Costa, Sergio Bampi:
Low-Power HEVC 8-point 2-D Discrete Cosine Transform Hardware Using Adder Compressors. NEWCAS 2018: 309-312 - [c85]Miguel R. Weirich, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
A Fixed-Point Natural Logarithm Approximation Hardware Design Using Taylor Series. NGCAS 2018: 53-56 - [c84]Maicon Robe Ferreira, Sérgio Jose Melo de Almeida, Eduardo Antonio Cesar da Costa:
Power System Frequency Estimation U Sing the Kernel Least Mean Square Algorithm and the Clarke Transform. NGCAS 2018: 134-137 - [c83]Brunno Abreu, Gustavo M. Santana, Mateus Grellert, Guilherme Paim, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi:
Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation. SBCCI 2018: 1-6 - [c82]João G. Nizer Rahmeier, Eduardo A. C. da Costa, Alessandro Girardi, Sidinei Ghissoni:
Optimization of Single-Stage FFT Architectures Using Multiple Constant Multiplication. SBCCI 2018: 1-6 - 2017
- [c81]Morgana Macedo, Leonardo Bandeira Soares, Bianca Silveira, Cláudio Machado Diniz, Eduardo A. C. da Costa:
Exploring the use of parallel prefix adder topologies into approximate adder circuits. ICECS 2017: 298-301 - [c80]Andre N. Sapper, Leonardo Bandeira Soares, Eduardo Costa, Sergio Bampi:
Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementation. ICECS 2017: 302-305 - [c79]Leandro M. G. Rocha, Guilherme Paim, Rafael S. Ferreira, Eduardo Costa, Sergio Bampi:
Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers. ICECS 2017: 478-481 - [c78]Guilherme Paim, Pedro Marques, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Sergio Bampi:
Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider. ICECS 2017: 482-485 - [c77]Gustavo M. Santana, Guilherme Paim, Leandro M. G. Rocha, Renato Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa, Sergio Bampi:
Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors. ICECS 2017: 486-489 - [c76]Bianca Silveira, Brunno Abreu, Guilherme Paim, Mateus Grellert, Rafael S. Ferreira, Cláudio Machado Diniz, Eduardo Costa, Sergio Bampi:
Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding. ICECS 2017: 490-493 - [c75]Brunno Abreu, Guilherme Paim, Mateus Grellert, Bianca Silveira, Cláudio Machado Diniz, Eduardo Costa, Sergio Bampi:
Exploiting absolute arithmetic for power-efficient sum of absolute differences. ICECS 2017: 522-525 - [c74]Leandro M. G. Rocha, Guilherme Paim, Gustavo M. Santana, Brunno A. Abreu, Rafael Ferreira, Eduardo A. C. da Costa, Sergio Bampi:
Physical implementation of an ASIC-oriented SRAM-based viterbi decoder. ICECS 2017: 526-529 - [c73]Rafael Ferreira, Bianca Silveira, Mateus Beck Fonseca, Cláudio Machado Diniz, Eduardo A. C. da Costa:
Low power sum of absolute differences architecture using novel hybrid adder. LASCAS 2017: 1-4 - [c72]Renato H. Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa, Jean P. Oses:
Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies. LASCAS 2017: 1-4 - [c71]Guilherme Paim, Leonardo Bandeira Soares, Rafael S. Ferreira, Eduardo Costa, Sergio Bampi:
Pruning and approximation of coefficients for power-efficient 2-D Discrete Tchebichef Transform. NEWCAS 2017: 25-28 - [c70]Bianca Silveira, Rafael S. Ferreira, Guilherme Paim, Cláudio Machado Diniz, Eduardo A. C. da Costa:
Low power SATD architecture employing multiple sizes Hadamard Transforms and adder compressors. NEWCAS 2017: 277-280 - [c69]Raphael Dornelles, Guilherme Paim, Bianca Silveira, Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi:
A power-efficient 4-2 Adder Compressor topology. NEWCAS 2017: 281-284 - [c68]Guilherme Paim, Rafael S. Ferreira, Leandro M. G. Rocha, Eduardo A. C. da Costa, Tiago Giacomelli Alves, Sergio Bampi:
A power-predictive environment for fast and power-aware ASIC-based FIR filter design. SBCCI 2017: 168-173 - 2016
- [c67]Guilherme Paim, Leonardo Bandeira Soares, Julio F. R. Oliveira, Eduardo Costa, Sergio Bampi:
A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing. ICECS 2016: 261-264 - [c66]Bianca Silveira, Guilherme Paim, Cláudio Machado Diniz, Eduardo A. C. da Costa:
Power-efficient sum of absolute differences architecture using adder compressors. ICECS 2016: 340-343 - [c65]Renato Neuenfeld, Mateus Fonseca, Eduardo A. C. da Costa:
Design of optimized radix-2 and radix-4 butterflies from FFT with decimation in time. LASCAS 2016: 171-174 - [c64]Gustavo Ott, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Mateus Fonseca:
Exploiting architectural solutions for IIR filter architecture with truncation error feedback. LASCAS 2016: 375-378 - [c63]Julio de Oliveira, Leonardo Bandeira Soares, Eduardo Costa, Sergio Bampi:
Exploiting approximate adder circuits for power-efficient Gaussian and Gradient filters for Canny edge detector algorithm. LASCAS 2016: 379-382 - [c62]Tiago Schiavon, Guilherme Paim, Mateus Fonseca, Eduardo A. C. da Costa, Sérgio J. M. de Almeida:
Exploiting adder compressors for power-efficient 2-D approximate DCT realization. LASCAS 2016: 383-386 - [c61]Guilherme Paim, Eduardo A. C. da Costa:
Using adder compressors for power-efficient 2-D approximate Discrete Tchebichef Transform. NEWCAS 2016: 1-4 - [c60]Leonardo Bandeira Soares, Cláudio Machado Diniz, Eduardo Antonio Cesar da Costa, Sergio Bampi:
A novel pruned-based algorithm for energy-efficient SATD operation in the HEVC coding. SBCCI 2016: 1-6 - 2015
- [c59]Guilherme Paim, Mateus Fonseca, Eduardo A. C. da Costa, Sérgio J. M. de Almeida:
Power efficient 2-D rounded cosine transform with adder compressors for image compression. ICECS 2015: 348-351 - [c58]Anderson Martins, Mateus Fonseca, Eduardo A. C. da Costa:
Optimal combination of dedicated multiplication blocks and adder trees schemes for optimized radix-2m array multipliers realization. ICECS 2015: 352-355 - [c57]Julio F. R. Oliveira, Leonardo Bandeira Soares, Eduardo A. C. da Costa, Sergio Bampi:
Energy-efficient Gaussian filter for image processing using approximate adder circuits. ICECS 2015: 450-453 - [c56]Bianca Silveira, Cláudio Machado Diniz, Mateus Fonseca, Eduardo A. C. da Costa:
SATD hardware architecture based on 8×8 Hadamard Transform for HEVC encoder. ICECS 2015: 576-579 - [c55]Vagner Guidotti, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Mateus Fonseca:
Floating-point adaptive filter architectures for the cancelling of harmonics power line interference. ICECS 2015: 609-612 - [c54]Cláudio Machado Diniz, Mateus Beck Fonseca, Eduardo A. C. da Costa, Sergio Bampi:
Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors. NEWCAS 2015: 1-4 - [c53]Leonardo Bandeira Soares, Sergio Bampi, Eduardo Costa:
Approximate adder synthesis for area- and energy-efficient FIR filters in CMOS VLSI. NEWCAS 2015: 1-4 - [c52]Leonardo Bandeira Soares, Sergio Bampi, Andre Luis Rodeghiero Rosa, Eduardo A. C. da Costa:
Near-threshold computing for very wide frequency scaling: Approximate adders to rescue performance. NEWCAS 2015: 1-4 - [c51]Sidinei Ghissoni, Eduardo Costa, Ricardo Reis:
Reusing smaller optimized FFT blocks for the realization of larger power-efficient radix-2 FFTs. PATMOS 2015: 169-176 - 2014
- [c50]Sidinei Ghissoni, Eduardo A. C. da Costa, Angelo Goncalves da Luz:
Implementation of power efficient multicore FFT datapaths by reordering the twiddle factors. VLSI-SoC 2014: 1-6 - 2013
- [c49]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Exploration of tradeoffs in the design of integer cosine transforms for image compression. ECCTD 2013: 1-4 - [c48]João G. Nizer Rahmeier, Angelo G. da Luz, Eduardo A. C. da Costa, Sidinei Ghissoni:
Reducing switching activity in FIR filters by reordering the coefficients through the use of improved heuristic algorithm. ICECS 2013: 33-36 - [c47]Eduardo A. C. da Costa, Sérgio J. M. de Almeida:
Design of an efficient FPGA-based interference canceller structure using NLMS adaptive algorithm. ICECS 2013: 779-782 - [c46]Angelo Goncalves da Luz, Eduardo A. C. da Costa, Sidinei Ghissoni:
Reducing the Hamming distance of encoded FFT twiddle factors using improved heuristic algorithms. LASCAS 2013: 1-4 - [c45]Gustavo Seibel, Fábio P. Itturriet, Eduardo Costa, Sérgio Almeida:
Fixed-point adaptive filter architecture for the harmonics power line interference cancelling. LASCAS 2013: 1-4 - [c44]Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Monica Matzenauer:
Gray encoded fixed-point LMS adaptive filter architecture for the harmonics power line interference cancelling. SBCCI 2013: 1-6 - [c43]Leandro Zafalon Pieper, Eduardo A. C. da Costa, José C. Monteiro:
Combination of radix-2m multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers. SBCCI 2013: 1-6 - 2012
- [c42]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Design of low-complexity digital finite impulse response filters on FPGAs. DATE 2012: 1197-1202 - [c41]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Multiple tunable constant multiplications: Algorithms and applications. ICCAD 2012: 473-479 - [c40]Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis:
Efficient area and power multiplication part of FFT based on twiddle factor decomposition. ICECS 2012: 657-660 - 2011
- [c39]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Optimization of gate-level area in high throughput Multiple Constant Multiplications. ECCTD 2011: 588-591 - [c38]João S. Altermann, Eduardo A. C. da Costa, Sérgio J. M. de Almeida:
High performance Haar Wavelet transform architecture. ECCTD 2011: 596-599 - [c37]Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro:
Efficient shift-adds design of digit-serial multiple constant multiplications. ACM Great Lakes Symposium on VLSI 2011: 61-66 - [c36]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Design of low-power multiple constant multiplications using low-complexity minimum depth operations. ACM Great Lakes Symposium on VLSI 2011: 79-84 - [c35]Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis:
Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization. ICECS 2011: 567-570 - [c34]Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro:
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level. ISCAS 2011: 2737-2740 - [c33]Angelo G. da Luz, Eduardo A. C. da Costa, Marilton S. de Aguiar:
Exploring the use of heuristic-based algorithms for the ordering and partitioning of coefficients for power efficient fir filters realization. SBCCI 2011: 91-96 - [c32]Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Multiplierless Design of Linear DSP Transforms. VLSI-SoC (Selected Papers) 2011: 73-93 - [c31]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
A hybrid algorithm for the optimization of area and delay in linear DSP transforms. VLSI-SoC 2011: 148-153 - 2010
- [c30]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications. DSD 2010: 3-10 - [c29]Sidinei Ghissoni, Eduardo Costa, Cristiano Lazzari, José Monteiro, Levent Aksoy, Ricardo Reis:
Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach. ICECS 2010: 859-862 - [c28]Cláudio Machado Diniz, João S. Altermann, Eduardo A. C. da Costa, Sergio Bampi:
Performance enhancement of H.264/AVC intra frame prediction hardware using efficient 4-2 and 5-2 adder-compressors. SBCCI 2010: 157-162 - [c27]Angelo G. da Luz, Eduardo A. C. da Costa, Marilton S. de Aguiar:
Ordering and partitioning of coefficients based on heuristic algorithms for low power FIR filter realization. SBCCI 2010: 180-185 - [c26]Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paulo F. Flores, José Monteiro:
Design of low-complexity and high-speed digital Finite Impulse Response filters. VLSI-SoC 2010: 292-297 - [c25]João S. Altermann, Eduardo A. C. da Costa, Sergio Bampi:
Fast forward and inverse transforms for the H.264/AVC standard using hierarchical adder compressors. VLSI-SoC 2010: 310-315 - 2009
- [c24]Marcelo Schiavon Porto, Sergio Bampi, João S. Altermann, Eduardo Costa:
Power efficient architecture for motion estimation using the QSDS-DIC algorithm. ICECS 2009: 331-334 - [c23]Vagner S. Rosa, Fabio F. Daitx, Eduardo Costa, Sergio Bampi:
Design flow for the generation of optimized FIR filters. ICECS 2009: 1000-1003 - [c22]Levent Aksoy, Diego Jaccottet, Eduardo Costa:
Design of low complexity digital FIR filters. SBCCI 2009 - [c21]André Silva, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Marcelo Schiavon Porto, Sergio Bampi:
High performance motion estimation architecture using efficient adder-compressors. SBCCI 2009 - 2007
- [c20]Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Optimization of Area in Digital FIR Filters using Gate-Level Metrics. DAC 2007: 420-423 - [c19]Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Minimum number of operations under a general number representation for digital filter synthesis. ECCTD 2007: 252-255 - [c18]Levent Aksoy, Ece Olcay Günes, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Effect of Number Representation on the Achievable Minimum Number of Operations in Multiple Constant Multiplications. SiPS 2007: 424-429 - 2006
- [c17]Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming. DAC 2006: 669-674 - [c16]Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro:
ASSUMEs: Heuristic Algorithms for Optimization of Area and Delay in Digital Filter Synthesis. ICECS 2006: 748-751 - [c15]Vagner S. Rosa, Eduardo A. C. da Costa, Sergio Bampi:
A High Performance Parallel FIR Filters Generation Tool. IEEE International Workshop on Rapid System Prototyping 2006: 216-222 - [c14]Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Exploiting general coefficient representation for the optimal sharing of partial products in MCMs. SBCCI 2006: 161-166 - [c13]Vagner S. Rosa, Eduardo A. C. da Costa, Sergio Bampi:
A VHDL Generation Tool for Optimized Parallel FIR Filters. VLSI-SoC 2006: 134-139 - 2005
- [c12]Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro:
Maximal sharing of partial terms in MCM under minimal signed digit representation. ECCTD 2005: 221-224 - [c11]Paulo F. Flores, José Monteiro, Eduardo A. C. da Costa:
An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications. ICCAD 2005: 13-16 - [c10]Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José Monteiro:
Design of a radix-2m hybrid array multiplier using carry save adder format. SBCCI 2005: 172-177 - [c9]Leonardo Londero de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José Monteiro, João Baptista dos Santos Martins, Sergio Bampi, Ricardo Augusto da Luz Reis:
A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures. VLSI-SoC 2005: 25-39 - 2004
- [c8]Vagner S. Rosa, Eduardo A. C. da Costa, José C. Monteiro, Sergio Bampi:
An improved synthesis method for low power hardwired FIR filters. SBCCI 2004: 237-241 - 2003
- [c7]Eduardo A. C. da Costa, Sergio Bampi, José Monteiro:
A New Pipelined Array Architecture for Signed Multiplication. SBCCI 2003: 65-70 - [c6]Eduardo A. C. da Costa, José C. Monteiro, Sergio Bampi:
Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths. VLSI-SoC (Selected Papers) 2003: 281-297 - [c5]Eduardo A. C. da Costa, José C. Monteiro, Sergio Bampi:
Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths. VLSI-SOC 2003: 307- - 2002
- [c4]Eduardo A. C. da Costa, Sergio Bampi, José Monteiro:
A New Architecture for Signed Radix-2m Pure Array Multipliers. ICCD 2002: 112-117 - [c3]Eduardo Costa, Sergio Bampi, José Monteiro:
A New Architecture for 2's Complement Gray Encoded Array Multiplier. SBCCI 2002: 14-19 - 2001
- [c2]Eduardo Costa, Sergio Bampi, José Monteiro:
Power Efficient Arithmetic Operand Encoding. SBCCI 2001: 201-206 - 2000
- [c1]Eduardo A. C. da Costa, Fernando Paixão Cortes, Rodrigo Ferrugem Cardoso, Luigi Carro, Sergio Bampi:
Modeling of Short Circuit Power Consumption Using Timing-Only Logic Cell Macromodels. SBCCI 2000: 222-227
Coauthor Index
[j32] [j31] [j30] [j29] [j28] [j27] [j26] [j25] [j24] [j23] [j22] [j21] [j20] [j19] [j18] [j17] [j16] [j15] [j14] [j13] [j12] [j10] [j9] [j8] [j3] [j1] [c120] [c119] [c118] [c117] [c116] [c115] [c114] [c113] [c112] [c111] [c110] [c109] [c108] [c106] [c105] [c104] [c103] [c102] [c101] [c100] [c99] [c98] [c97] [c96] [c95] [c94] [c93] [c92] [c91] [c90] [c89] [c88] [c87] [c86] [c85] [c83] [c80] [c79] [c78] [c77] [c76] [c75] [c74] [c71] [c69] [c68] [c67] [c63] [c60] [c57] [c54] [c53] [c52] [c28] [c25] [c24] [c23] [c21] [c15] [c13] [c10] [c9] [c8] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
Mateus Fonseca
aka: Mateus Beck Fonseca
aka: Mateus Beck Fonseca
[j32] [j30] [j29] [j28] [j27] [j26] [j25] [j24] [j23] [j22] [j21] [j20] [j19] [j18] [j17] [j16] [j15] [j13] [j12] [j10] [j8] [c120] [c115] [c114] [c112] [c111] [c110] [c109] [c108] [c106] [c105] [c104] [c103] [c102] [c101] [c100] [c99] [c98] [c97] [c95] [c94] [c93] [c91] [c90] [c89] [c88] [c86] [c85] [c83] [c79] [c78] [c77] [c76] [c75] [c74] [c71] [c70] [c69] [c68] [c67] [c66] [c62] [c61] [c59]
Leandro M. G. Rocha
aka: Leandro Mateus Giacomini Rocha
aka: Leandro Mateus Giacomini Rocha
Rafael Soares
aka: Rafael Iankowski Soares
aka: Rafael Iankowski Soares
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