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ORCID21st NEWCAS 2023: Edinburgh, United Kingdom
- 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, United Kingdom, June 26-28, 2023. IEEE 2023, ISBN 979-8-3503-0024-6
- Enne Wittenhagen, Patrick Kurth, Urs Hecht, Frowin Buballa, Sebastian Linnhoff, Nima Lotfi
, Friedel Gerfers:
A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOS. 1-4 - Dhanashree Boopathy, Tze Hin Cheung, Andrei Spelman, Agnimesh Ghosh, Vesa Lampu, Lauri Anttila, Kari Stadius, Marko Kosunen, Jussi Ryynänen, Vishnu Unnikrishnan:
High-Precision Time-to-Digital Conversion for Calibration of Outphasing Radio Transmitters. 1-5 - Pei-Sheng Lu, Rung-Bin Lin:
Improving Pin Accessibility of Standard Cells under Power/Ground Stripes. 1-5 - Elmira Moussavi, Animesh Singh, Dominik Sisejkovic, Aravind Padma Kumar, Daniyar Kizatov, Sven Ingebrandt, Rainer Leupers, Vivek Pachauri, Farhad Merchant:
Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic. 1-5 - Yaning Wang, Yihang Cheng, Yongli Chen, Fule Li, Chun Zhang, Zhihua Wang:
A Low Noise High Speed Dynamic Comparator Insensitive to PVT and Common-mode Input. 1-5 - Syed Farah Naz, Mansi Chawla, Ambika Prasad Shah:
Leakage Power Attack and Half Select Issue Resilient Split 8T SRAM Cell. 1-2 - Ali Poursaadati Zinjanab, Nakisa Shams, Frederic Nabki:
A Low Power Ultra-Wideband RF Receiver Front-End using a Differential N-Path Notch Filter. 1-4 - Hanyue Li, Yuting Shen, Eugenio Cantatore, Pieter Harpe:
A 10-bit 10 MS/s SAR ADC with Duty-Cycled Multiple Feedback Filter. 1-5 - Byung-Kwon An, Xueyong Zhang, Anh Tuan Do, Tony Tae-Hyoung Kim:
Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory. 1-5 - Christian Hoyer, Lucas Wetzel, Dimitrios A. Prousalis, Jens Wagner, Frank Jülicher, Frank Ellinger:
Heterogeneity in Time Delays between Mutually Synchronized 24 GHz Oscillators. 1-5 - Lars Wulfert, Christian Wiede, Anton Grabmaier:
TinyFL: On-Device Training, Communication and Aggregation on a Microcontroller For Federated Learning. 1-5 - Mithun Datta, Alexander C. Bodoh, Ashiq A. Sakib:
Error Resilient Sleep Convention Logic Asynchronous Circuit Design. 1-5 - Iman Ghotbi, Baktash Behmanesh, Markus Törmänen:
Broadband RF Front-End Featuring a Reconfigurable Q-Enhanced Filter for Upper Mid-Band 6G Receivers. 1-5 - Katia Samperi, Salvatore Pennisi, Francesco Pulvirenti:
High-Speed all-GaN Gate Driver with reduced power consumption. 1-5 - Youssef Bendou, Martin Rack, Dimitri Lederer, Andreia Cathelin, Jean-Pierre Raskin:
Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOI. 1-5 - Ashkan Samadi, Marwan Ammar, Otmane Aït Mohamed:
Statistical Model Checking based Analysis of Fault Trees and Power Consumption to Enhance Autonomous Systems Reliability. 1-5 - Oren Ganon, Itamar Levi:
Modular Processor Architecture with Cryptography ISA Extensions. 1-2 - Ruochen Ding, William Tatinian:
Design and modeling of heterogeneous semi-active wake-up radio for sensor network applications. 1-4 - Rashi Dutt, Souris Sahu, Arghadeep Sarkar, Amit Acharyya:
Next-Generation Battery Management System Design Methodology. 1-2 - Hiroki Sato, Shigetaka Takagi:
CMOS Continuous-Time Integrator with Capacitance Multiplier. 1-5 - Michael Pietzko, Julian Spiess, Jonathan Ungethüm, John G. Kauffman, Qiang Li, Maurits Ortmanns:
Bitwise ELD Compensation under Integrator Nonidealities in ΔΣ Modulators. 1-5 - Prasannata Bhange, Deepak Kumar Joshi, Amit Acharyya, Sunil Kumar Pandu, Kamal Mankari, Swati Ghosh Acharyya:
Phase Space Reconstruction Based Methodology For Real Time Impact Assessment of Corrosion On Structural Health of Ship Material Using In-situ Acoustic Emission Sensors. 1-5 - Di Chen, Hui Gao, Na Chen, Ruohan Cao:
Integrated Beamforming and Resource Allocation in RIS-Assisted mmWave Networks based on Deep Reinforcement Learning. 1-5 - Sebastian Jenderny, Karlheinz Ochs, Matthew Gibson, Philipp Hövel:
A Simplified Hindmarsh-Rose Model Based on Power-Flow Analysis. 1-5 - Yunpeng Yao, Man Wu, Renyuan Zhang:
Training Low-Latency Spiking Neural Network with Orthogonal Spiking Neurons. 1-5 - Mojtaba Mahdavi:
Fully Parallel, Flexible, and Conflict-Free Interleaver Design using Processing in Memory. 1-2 - Franz Marcus Schüffny, Stefan Hänzsche, Stephan Henker, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr:
A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22 nm FDSOI. 1-5 - Lorenzo Scaletti, Luca Bertulessi, Andrea Cristofoli, Andrea Bonfanti:
A Novel Push-Pull Input Buffer for Wideband ADCs with Improved High-Frequency Linearity. 1-5 - Frowin Buballa, Sebastian Linnhoff, Enne Wittenhagen, Urs Hecht, Friedel Gerfers:
A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOS. 1-5 - Ananda Y. R., Subhashis Das, Gaurav Trivedi:
A Novel Dynamic Memristor Window Function for High Frequency Applications. 1-5 - Thalita E. Nazaré, Samir A. M. Martins, Erivelton Geraldo Nepomuceno:
Efficiency and Sustainability in Simulation: Enhancing Accuracy of Chaotic Maps Using Kahan Summation. 1-5 - Sani Mohammed Lawal, Nazila Fough, Nazmi Sellami, Firdaus Muhammad-Sukki:
Modeling and Simulation of Heterojunction Solar Cell; Determination of Optimal Values. 1-2 - Diana Kalel, Jean-Christophe Brignone, Irene Serre, Julian Massicot, Jerome Avezou:
UPF-Aware CDC Structural Verification on RTL. 1-2 - Frank Herzel, Corrado Carta, Gunter Fischer:
Random and Static Phase Errors in a PLL Array for Millimeter-Wave Frequency Generation. 1-5 - Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo:
Triple Clock Boosted Voltage Multiplier: A Design Strategy to Heavily Reduce Rise Time. 1-5 - Jungmin Lee, Wei Jia, Berardi Sensale Rodriguez, Jeffrey S. Walling:
Pixelated RF: Random Metasurface Based Electromagnetic Filters. 1-5 - Morgana Macedo Azevedo da Rosa, Eduardo A. C. da Costa, Rafael Iankowski Soares, Sergio Bampi:
Exploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing. 1-5 - Tomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita:
A Deep Reinforcement Learning-based Routing Algorithm for Unknown Erroneous Cells in DMFBs. 1-5 - Junjie Jing, Yang Ding, Lingxiao Shen, Peng Wang, Fule Li:
A Wide Input Common-mode Range Pipelined ADC Front-end with Common-mode Refreshing. 1-5 - Ali Sarafnia, M. Omair Ahmad, M. N. S. Swamy:
A Beam Steerable Speaker Tracking-based First-order Differential Microphone Array. 1-5 - Marius Siauciulis, David Northcote, Josh Goldsmith, Louise H. Crockett, Sarunas Kalade:
100GBit/s RF sample offload for RFSoC using GNU Radio and PYNQ. 1-5 - Mahdieh Shojaei Baghini, Kristiaan Broekens, Michiel P. Oderwald, Paul Breedveld, Hadi Heidari, Maurits F. J. Van der Heide:
Fiber-Bragg-Grating Coupled Magnetostrictive Sensors for Magnetic Tracking of Biomedical Implants. 1-4 - Lichen Yao, Sadeque Reza Khan, Guido Dolmans, Jac Romme, Srinjoy Mitra:
Localization of Miniature Ingestible coils using Tri-Polar Plane Type (TPT) Transmitter. 1-5 - Max Uhlmann, Emilio Pérez-Bosch Quesada, Markus Fritscher, Eduardo Pérez, Markus Andreas Schubert, Marc Reichenbach, Philip Ostrovskyy, Christian Wenger, Gerhard Kahmen:
One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory Computing. 1-5 - Fei Yuan:
Gated Ring Oscillator Time Amplifier with Applications in Time Integration. 1-5 - Lennart M. Reimann, Felix Staudigl, Rainer Leupers:
Automated Information Flow Analysis for Integrated Computing-in-Memory Modules. 1-5 - Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi:
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations. 1-5 - Andrea Boni, Michele Caselli, Francesco Frattini, Francesco Malena, Marco Ronchi:
Analog Baseband Circuits for Low-power 802-11ba Wake-up Radio in 40-nm CMOS. 1-5 - Sachin Maheshwari, Jiaqi Wang, Alexander Serb, Themistoklis Prodromakis:
A Memristor-based Tuneable Offset Comparator. 1-5 - Suraj Kumar Prusty, V. K. Surya, Nijwm Wary:
A High-Speed Charge-Injection based Double Tail Latch for Decision Feedback Equalizer (DFE). 1-5 - Yuanxi Cheng, Siming Zuo, Lisa Ranford-Cartwright, Nosrat Mirzai, Hadi Heidari:
Portable Diagnostic Platform for Rapid Detection of 2µL Paramagnetic Particles in 5s. 1-4 - Rashid Karim, Marco Grassi, Piero Malcovati:
1st-Order Error-Feedback Sampling-Rate Reconfigurable Noise-Shaping SAR ADC for Multi-Channel CMOS Front-End ASICs for Space Applications. 1-5 - Xiongfei Jiang, Caterina Sbandati, Grahame Reynolds, Chaohan Wang, Christos Papavassiliou, Alexander Serb, Themis Prodromakis, Shiwei Wang:
A Neural Recording System with 16 Reconfigurable Front-end Channels and Memristive Processing/Memory Unit. 1-5 - Jungang Zhang, Mahmoud Wagih, Daniel Hoare, Nosrat Mirzai, John R. Mercer, Rupam Das, Hadi Heidari:
Highly Integrated and Ultra-Compact Rectenna with Wireless Powering for Implantable Vascular Devices. 1-5 - Raphael Steinhoff, Steffen Moll, Sebastian Kaltenstadler, Albrecht Rothermel:
Retina Stimulator with Channel Dependent Arbitrary Waveforms in 28nm CMOS Process. 1-5 - Eduardo Pereira, Lucas Luza, Nicolas Moura, Luciano Ost, Ney Calazans, Fernando Gehm Moraes, Rafael Garibotti:
Assessment of Communication Protocols' Latency in Co-processing Robotic Systems. 1-5 - Daniel Junehee Lee, Fei Yuan, Yushi Zhou:
Time-Interpolated Vernier Digital-to-Time Converter with Applications in Time-Mode SAR TDC. 1-4 - Jiawei Xu, Yi Zheng, Chenxu Sheng, Yichen Cai, Dimitrios Stathis, Ruisi Shen, Lirong Zheng, Zhuo Zou, Laigui Hu, Ahmed Hemani:
Optoelectronic Memristor Model for Optical Synaptic Circuit of Spiking Neural Networks. 1-5 - Alassane Sidibe, Gaël Loubet, Alexandru Takacs, Lamoussa Sanogo, Daniela Dragomirescu:
Battery-free Bluetooth Low Energy Wireless Sensor Powered by Radiative Wireless Power Transfer. 1-4 - Fatemeh Shakibaee, Benoit Gosselin:
A Low-Voltage Submicrowatt, High-Speed CMOS Dynamic Comparator. 1-5 - Banseok Shin, Sehun Park, Jaeha Kung:
Improving Hardware Efficiency of a Sparse Training Accelerator by Restructuring a Reduction Network. 1-5 - Ximing Wang, Atsutake Kosuge, Yasuhiro Hayashi, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda:
Analysis and Design of a 7 Gb/s Rotatable Non-contact Connector with Grid Array Package Application. 1-4 - Sébastien Guigue, Camille Leroux, Jean-Baptiste Bégueret, Thierry Taris:
A 8.34 nW Wake-Up Receiver Achieving -50dBm Sensitivity at 2.4GHz. 1-4 - Hamidreza Mafi, Mohamed Ali, Yvon Savaria, Mohammad Honarparvar, Naim Ben-Hamida:
Background Calibration of Time-Interleaved ADCs with Polyphase Filters. 1-5 - Melvin Galicia, Leon Happek, Magnus Balzer, Rainer Leupers:
Frequency and noise characterization for baseband signal processing on neuromorphic circuits. 1-5 - Natachai Terawatsakul, Alireza Saberkari, Atila Alvandpour:
Extending Wireless Power Transfer Range for Self-Powered Micro Devices with mm-size Antenna. 1-5 - Shu-Yun Wu, Ching-Te Chiu, Yung-Ching Hsu:
Pose Aware RGBD-based Face Recognition System With Hierarchical Bilinear Pooling. 1-5 - Li Xiaolin, Hans Vandierendonck, Dimitrios S. Nikolopoulos, Bo Jin, Barry Cardiff, Deepu John:
Decentralised Biomedical Signal Classification using Early Exits. 1-2 - Rabia Fatima Riaz, Florian Protze, Christian Hoyer, Jens Wagner, Frank Ellinger:
Design and Experimental Evaluation of 60 GHz Self-compensating Bond-wire Interconnect. 1-5 - Chenyu Ma, Shanci Hu, Yuhang Hu, Tao Deng, Yuliang Han, Yi Li, Yuan Gao:
A Low-Noise CMOS Front-End with 534 MΩ Transimpedance Gain for Single-Molecule Signal Acquisition. 1-5 - Craig Stewart, Wai-Keung Fung, Nazila Fough, Radhakrishna Prabhu:
Extremely Random Forest based Automatic Tonic-Clonic Seizure Detection using Spectral Analysis on Electroencephalography Data. 1-2 - Mehreeq Mushtaq, Mohamad Idris Wani, Sadan Saquib Khan, Meraj Ahmad, Laxmeesha Somappa, Maryam Shojaei Baghini, Hadi Heidari, Shahid Malik:
Mismatch and Offset-Voltage Compensation Technique for Current Excitation Based Resistive Sensors Interface. 1-5 - Michal Borowski, Chandrajit Pal, Sangeet Saha, Ludovico Poli, Xiaojun Zhai, Klaus D. McDonald-Maier:
Anomaly Behaviour tracing of CHERI-RISC V using Hardware-Software Co-design. 1-5 - Weiping Wu, Shi Chen, Xun Bao, Lei Zhang, Yan Wang:
An Ultra-Wideband Amplifier With Compact Magnetically Coupled Feedback Gain Cell. 1-4 - Ahsan Javaid, Ramachandra Achar:
PSIJ Transfer Function Response Prediction via NARNET and KBNNs. 1-3 - Wei Ju, Aidan McConnell-Trevillion, Sadeque Reza Khan, Kianoush Nazarpour, Srinjoy Mitra:
A Feasibility Study on Textile Electrodes for Transcutaneous Electrical Nerve Stimulation. 1-5 - Hossam O. Ahmed:
Fault Tolerant Processing Unit Using Gamma Distribution Sliding Window For Autonomous Landing Guidance System. 1-2 - Komal Krishnamurthy, Omar Ghazal, Tian Lan, Fei Xia, Alex Yakovlev, Rishad A. Shafik:
Variable Duty Cycle Pulse Generation for Low Complexity Randomization in Machine Learning. 1-5 - Stefan Reich, Markus Sporer, Maurits Ortmanns:
A Time-Domain Charge-Balancing Method for Neuromodulators. 1-5 - Sahil Dalvi, Pilli Kalyan Kumar, Olive Ray, Nijwm Wary:
A Fully Integrated SCC DC-DC Converter with Novel FMC Controller for Fast Transient Response. 1-5 - Mahfuzul Islam, Shogo Harada, Takashi Hisakado, Osami Wada:
CMOS Temperature Sensor Utilizing Gate-length-based Threshold Voltage Modulation. 1-5 - Hongjian Tan, Zhuo Gao, Guo Li, Ruiliang Song, Hao Wei, Mingyi Chen:
An Asynchronous Single-Inductor Multi-Input Multi-Output DC-DC Converter for Ambient Energy Harvesting with 94.8% Peak Efficiency. 1-5 - Akwasi Akwaboah, Ralph Etienne-Cummings:
A Current-Mode Implementation of A Nearest Neighbor STDP Synapse. 1-5 - Chandrajit Pal, Pratibha Verma, Himanshu Rohit, Dubacharla Gyaneshwar, Sumohana S. Channappayya, Amit Acharyya:
SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge. 1-5 - Xu Wang, Michael Peter Kennedy:
Comparative Study of Linearized Analysis Frameworks for Mid-Rise TDCs. 1-5 - Hervé Barthélemy, Florent Barthélemy, Rémy Vauché, Sylvain Bourdel:
Inductive relaxation oscillator with current-limiting. 1-4 - Rikard Gannedahl, Javad Bagheri Asli, Henrik Sjöland, Atila Alvandpour:
A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity. 1-5 - Denis Flores, Dominique Dallet, Andrei Vladimirescu, Andreia Cathelin, Yann Deval:
High-Resolution Fractional Digital Frequency Divider using a Binary-Rate Multiplier. 1-5 - Hohyeon Lee, Minkyu Song, Soo Youn Kim:
Low-Power Single-Slope ADC with a Replica Comparator for Always-on CIS Applications. 1-5 - Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé:
Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept. 1-5 - Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler:
Verification of In-Memory Logic Design using ReRAM Crossbars. 1-5 - Ben Perach, Ronny Ronen, Shahar Kvatinsky:
Accelerating Relational Database Analytical Processing with Bulk-Bitwise Processing-in-Memory. 1-5 - Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo:
An Energy-Efficient Design Strategy for Dickson Charge Pumps with Linear Distributed Capacitance. 1-5 - Arghadeep Sarkar, Rashi Dutt, Souris Sahu, Amit Acharyya:
Energy-efficient and High Speed Active Cell Balancing Methodology for Lithium-ion Battery Pack. 1-5 - Rahul Mushini, John Dooley:
A Computationally Efficient Predistortion and Segment Thresholding for Distributed PA Arrays. 1-4 - Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant:
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar. 1-5 - Jonathan Lévesque, Félix Chamberland, Benoit Gosselin:
3D Printed Graphite Based Flexible Thermoplastic Polyurethane Electromyography Electrode. 1-5 - Niladri Bhattacharjee, Maximilian Reuter, Klaus Hofmann, Thomas Mikolajick, Jens Trommer:
Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable Devices. 1-5 - Stefan Reich, Markus Sporer, Maurits Ortmanns:
A flexible Power Management System-On-Chip for Implantable Brain-Machine-Interfaces. 1-5 - Maximilian Scherzer, Mario Auer, Werner Magnes:
An Integrated Analog Lock-In Amplifier using a Passive 3-Path Band-Pass Filter for a Fluxgate Sensor Readout Circuit. 1-4 - Sebastian Linnhoff, Frowin Buballa, Julius Edler, Enne Wittenhagen, Urs Hecht, Friedel Gerfers:
A 10Bit 6 GS/s Time-Interleaved SAR ADC with a Single Full-Rate Front-End Track-and-Hold. 1-5 - Ankush Mamgain, Manasa Madhvaraj, Salvador Mir, Manuel J. Barragán, Jai Narayan Tripathi:
A sub-picosecond resolution jitter instrument for GHz frequencies based on a sub-sampling TDA. 1-5 - Nicolai J. Dahl, Pere Llimós Muntal, Michael A. E. Andersen:
Fully Time-Based PID Controller for a High Frequency Buck Converter. 1-5 - Jingze Wang, Shulan Chen, Lei Zhang, Yan Wang:
A V-Band Compact LNA With Gm-Boosting and Noise-Cancelling Technique. 1-5 - Urvashi Bansal, Alfio Dario Grasso:
A compensation scheme for three-stage OTAs with no Miller capacitors. 1-4 - Jun-Wan Wu, Yu-Sin Chang, Ding-Hao Wang, Po-Hung Chen:
An Inaccuracy Thermal Sensor with a New Digital Calibration Algorithm in 12nm CMOS. 1-4 - Amirali Ebrahimi, Vineeth Narayan Pullu, J. M. Pierre Langlois, Jean-Pierre David:
Iterative pruning algorithm for efficient look-up table implementation of binary neural networks. 1-5 - Hamid Sadrimanesh, Yves Blaquière, Frederic Nabki:
Toward 2.5D Structures for Multi-Channel MEMS Acoustic-Based Digital Isolators using Through Silicon Openings. 1-5 - Manisha G, Amit Krishna Dwivedi, V. Uma Maheswari, Prasun Chakrabarti, Martin Margala:
Optimum Supply Voltage for High Gain Amplifier in Telemetry Circuitry for Ultra-Low Power Implantable Cardiac Pacemaker. 1-5 - Zheyi Li, Laurent Berti, Geert Thys, Paul Leroux:
A CDAC Mismatch Calibration Technique for SAR-assisted Pipeline ADCs. 1-5 - Emad A. Abdo, Peimin Yuan, Yujin Zheng, Alex Yakovlev, Patrick Degenaar:
A Multi-Modal Stimulator System for Visual Prosthesis. 1-5 - Yuqing Mao, Yoann Charlon, Yves Leduc, Gilles Jacquemod:
New design of an ultra low power CDR architecture using FDSOI 28 nm technology. 1-5 - Shayan Zohrei, Bayan Alsalem, Sébastien Le Beux:
A Method to Reduce the Design Complexity of Nanophotonic Interconnects. 1-5 - Xu Wang, Michael Peter Kennedy:
Linearized Analysis of Mid-Rise TDCs for Integer-N and Fractional-N Digital PLLs. 1-5 - Roberto Gómez-García, José M. Muñoz-Ferreras, Li Yang, Xi Zhu:
On the Synthesis of Lossy Analog Filter Networks With Lossless-Like Passband Shape. 1-5 - Antoine Lhomel, Maxandre Fellmann, Rémi Quéheille, Yann Deval, Eric Kerhervé, François Rivet, Nathalie Deltimple:
A 2.45GHz SiGe Power Amplifier with a Novel Digital Predistortion using Orthogonal Sequences. 1-5 - Sushmita Ghosh, Shouri Chatterjee, Swades De, Ajay K. Poddar, Ulrich L. Rohde:
PWM Controlled 180° Analog Phase Shifter. 1-4 - Mikhail Manokhin, Paul Chollet, Patricia Desgreys:
Flexible Analog-to-Feature Converter for Wireless Smart Healthcare Sensors. 1-5 - Tzung-Je Lee, Meng-Lin Tsai:
A High Dynamic-Range Readout Circuit with Differential Resistance-to-Time Conversion for Gas Sensor. 1-4 - Tobias Wolfer, Eckhard Hennig:
Performance and Stability Characterization of a 3rd Order Continuous-Time Delta-Sigma Modulator with Active Time-Constant Tuning. 1-4 - Pv Mohammad Navaz, Chithra Reghuvaran, Alex James:
Memristive Crossbar for Hyper Dimensional Consumer Text Analytics Accelerator. 1-5 - Sebastian Jenderny, Karlheinz Ochs, Kamel Naoum Naame:
A Reservoir Computer-Based Modeling of Hunting Dynamics in Predator-Prey Scenarios. 1-5 - Praveen Saraswat, Mahima Arrawatia:
Doherty Power Amplifier with Compact Load Modulation Network for 5G Applications. 1-5 - Tsung-Wen Sun, Meng-Ze Li, Tsung-Heng Tsai, Chia-Chan Chang:
A High-Accuracy Hysteretic DC-DC Converter Using A Spread-Spectrum EMI Suppression Technique with Double Gold Codes. 1-4 - Pål Gunnar Hogganvik, Dag T. Wisland:
A 2 GHz bandwidth, 6-bit inverter-based open-loop amplifier for high-speed ADCs. 1-5 - Reza Papi, Fereidoon Hashemi Noshahr, Benoit Gosselin:
A New Current-Mode Subthreshold, High-PSRR MOSFET-Only Bandgap Voltage Reference. 1-5 - Milad Eslaminia, Sébastien Le Beux:
A Shared Synapse Architecture for All-Optical Spiking Neural Networks. 1-5 - Pin-Chen Yeh, Shih-En Chen, Kuang-Wei Cheng:
A 433MHz Multi-Mode Wake-Up Receiver Achieving High Sensitivity via Balun LNA and Injection Locked Oscillator. 1-4 - Tomoya Akabe, Ryotaro Funai, Yasuhiko Nakashima:
Sensitivity Analysis of Memory Bandwidth on Column-superposed Versatile Linear CGRA. 1-5 - Cong Gao, Xuqi Zhu, Sangeet Saha, Klaus D. McDonald-Maier, Xiaojun Zhai:
Modelling and Analysis of FPGA-based MPSoC System with Multiple DNN Accelerators. 1-5 - Pedro T. L. Pereira, Guilherme Paim, Eduardo A. C. da Costa, Paulo F. Flores, Sergio Bampi:
Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI Design. 1-5 - Lakhdar Mamouri, Vincent Frick:
Adaptive FOCV MPPT for Piezoelectric Energy Harvesting Circuit. 1-5 - Tristan Lecocq, Olivier Mazouffre, Eric Kerhervé, Jean-Marie Pham:
NB-IoT Wideband Power Amplifier and Diode-Based Antenna Switch co-Integration in 130 nm CMOS SOI. 1-5 - Feng Tai, Qiang Li:
Improved Dynamic Comparator With Adaptive Delay Line for the Latch Conduction and Regenerative Feedback Assisted FIA. 1-5 - Liyuan Guo, Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Annika Weiße, Stefan Scholze, Richard George, Johannes Partzsch, Christian Mayr:
A 16-channel Real-time Adaptive Neural Signal Compression Engine in 22nm FDSOI. 1-5 - Jelle Biesmans, Kris Myny, Nele Mentens:
Evaluation of Secure Circuit Styles Using Unipolar Logic Gates. 1-5 - Berkay Özbek, Timothy G. Constandinou:
An Autonomous Zero-Mask Unique ID Generation System for Next-Generation Neural Interfaces. 1-5 - Andrea Mifsud, Timothy G. Constandinou:
Towards a CMOS-Process-Portable ReRAM PDK. 1-5 - Théo Dupuis, Yoan Fournier, MohammadHossein AskariHemmat, Nizar El Zarif, François Leduc-Primeau, Jean-Pierre David, Yvon Savaria:
Sparq: A Custom RISC-V Vector Processor for Efficient Sub-Byte Quantized Inference. 1-5 - Deni Germano Alves Neto, Cristina Missel Adotnes, Gabriel Maranhão, Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Márcio Cherem Schneider, Sylvain Bourdel, Carlos Galup-Montoro:
A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTRE. 1-5 - Mahziar Serri Mazandarani, Gabriel Gagnon-Turcotte, Mohamad Sawan, Benoit Gosselin:
A sub-mW Ultra-Low Power Low-Voltage LED Driver for a Patch Pulse Oximetry. 1-4 - Javad Bagheri Asli, Alireza Saberkari, Atila Alvandpour:
A Parallel-Path Amplifier for Fast Output Settling. 1-4 - Guangxian Zhu, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima:
An Ultra-Compact Calculation Unit with Temporal-Spatial Re-configurability. 1-5 - Haoyang Shen, Hao Zheng, Daniel O'Hare, Deepu John, Barry Cardiff:
Correcting ADC jitter using DPLL timing error signal. 1-5 - Olivia Chen, Yanzhi Wang, Fei Ke, Nobuyuki Yoshikawa:
Design and Implementation of an FFT-Based Neural Network Accelerator Using Rapid Single-Flux-Quantum Technology. 1-5 - Yilun Jin, Yuhang Zhang, Zhiwen Gu, Jian Zhao, Zhihong Luo, Yanhan Zeng, Yongfu Li:
A Dual-Output Picowatt Hybrid Voltage Reference with Digital Trimming Technique. 1-5 - Maria Frontera-Bergas, Bartomeu Oliver-Riera, Josep Genovard-Oliver, Miguel Vinaixa-Fernández, Eugeni M. Isern-Riutort, Jaume Ramis-Bibiloni, Miquel J. Roca-Adrover, Bartomeu Alorda-Ladaria:
Sensor node design and evaluation for quality assurance of drugs. 1-2 - Kunihiro Fujiyoshi, Tomoya Masutani:
A Necessary and Sufficient Condition to Generate Representative Clip for Edge-Constrained Clustering of Layout Pattern Classification Problem. 1-4 - Qingxun Wang, Kaiquan Chen, Liang Qi:
A Zoom Architecture Using Linear-Exponential Incremental ADC. 1-5 - Prema Kumar Govindaswamy, P. Vijay Shankar:
High-Swing, Power-efficient, Current-Mode Hybrid Circuit Topologies for Simultaneous Bidirectional Communication. 1-5 - Hsueh-Kai Kuo, Ching-Te Chiu, Lien-Chieh Huang:
Low Temperature and Dry Fingerprint Restoration with Ridge Loss and Orientation. 1-5 - Abdurrashid Hassan Shuaibu, Yves Blaquière, Frédéric Nabki:
Toward a Polysilicon-Based Electrostatically Actuated DC MEMS Switch. 1-4 - Lewis J. Brown, Louise H. Crockett, Robert W. Stewart:
RFSoC Implementation of Runtime Reconfigurable Numerologies for 5G New Radio. 1-2 - Sebastian Jenderny, Karlheinz Ochs, Oways Alsoloh:
Wave Digital Emulation of a Light-Modulated Central Pattern Generator. 1-4 - Kakeru Ando, Minoru Watanabe, Nobuya Watanabe:
Multi-context-scrubbing operation for a 1-bit counter circuit. 1-4 - Thalita E. Nazaré, Josefredo Gadelha, Erivelton Geraldo Nepomuceno:
Enhancing Real-world Inverted Pendulum Stabilization: Addressing External Perturbations with Feedback and Model Predictive Control. 1-2 - Philipp Löhler, Andreas Pickhinke, Andreas Erbslöh, Karsten Seidl:
A 1,224-Channel 60 μm Pitch Active Closed-Loop Stimulator for Selective Retinal Ganglion Cell Type Activation. 1-4 - Liangtao Dai, Binzhe Yuan, Yuan Wang, Chao Yang, Xin Lou:
Error Analysis for Fused Floating-point Square-root and Division based on Goldschmidt Algorithm. 1-5 - Dufour Jules, Yvon Savaria, Jean-Pierre David:
Low-Energy, Scalable, On-demand State-of-charge Estimation System for Li-ion batteries. 1-5 - Shady Agwa, Themis Prodromakis:
Bent-Pyramid: Towards A Quasi-Stochastic Data Representation for AI Hardware. 1-5 - Jarrah Bergeron, Sudhakar Pamarti:
A Spur-free Dynamic Element Matching Scheme for Bandpass DACs. 1-5 - Steffen Märcker, Michael Raitza, Shubham Rai, Giulio Galderisi, Thomas Mikolajick, Jens Trommer, Akash Kumar:
Formal Analysis of Camouflaged Reconfigurable Circuits. 1-5 - Kaito Mori, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita:
A Fast Approach to Droplet Routing with Shape-Dependent Velocity on MEDA Biochips. 1-5 - Andrew Maclellan, Louise H. Crockett, Robert W. Stewart:
Streaming Convolutional Neural Network FPGA Architecture for RFSoC Data Converters. 1-5 - Modou Dibba, Cheol-Hong Min:
American Sign Language Recognition System Using Wearable Sensors and Machine Learning. 1-5 - Raghav Bansal, Shouri Chatterjee:
A 40 nA, 84% Efficient, PLL-based Rectifier-Less Power Switching Converter for Low-Voltage Piezoelectric Energy Harvesting. 1-5 - Ilia Polian, Nan Du, Werner Schindler:
Overview of Memristive Cryptography. 1-5 - Shahzad Haider, Junhao Liang, Song Chen:
Efficient Transistor-Level QDI Asynchronous Switch for Neuromorphic Systems. 1-5 - Chandan Kumar Jha, Rolf Drechsler:
Benchmarking Multiplier Architectures for MAGIC Based In-Memory Computing. 1-5 - C. Kishore, Santhosh Sivasubramani, Rishad A. Shafik, Amit Acharyya:
Nano-Magnetic Logic based Architecture for Edge Inference using Tsetlin Machine. 1-5 - Ritesh Sachdeva, Abhishek Kumar:
A Single-Turn Inductor based Compact and Wide-Tuning LC-VCO using Dual-Resonant Modes. 1-5 - Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant:
Finite State Automata Design using 1T1R ReRAM Crossbar. 1-5
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