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ORCID16th ICECS 2009: Yasmine Hammamet, Tunisia
- 16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009, Yasmine Hammamet, Tunisia, 13-19 December, 2009. IEEE 2009, ISBN 978-1-4244-5090-9
- Gregorio Cappuccino
, Francesco A. Amoroso, Andrea Pugliese:
Class-AB output stage design for high-speed three-stage op-amps. 1-4 - Francesco A. Amoroso, Andrea Pugliese, Gregorio Cappuccino:
Design considerations for fast-settling two-stage Miller-compensated operational amplifiers. 5-8 - Georg Ellguth, Stephan Henker, Christian Mayr, René Schüffny:
Current conveyor based amplifier and adaptive buffer for use in an analog frontend. 9-12 - Yarallah Koolivand, Mohammad Yavari, Omid Shoaei, Ali Fotowat-Ahmady:
Low voltage low power techniques in design of zero IF CMOS receivers. 13-16 - Masayuki Ikebe, Daisuke Ueo, Kazuhiro Takahagi, Masaki Ohuno, Yusuke Takada, Eiichi Sano:
A 3.1-10.6 GHz RF CMOS circuits monolithically integrated with dipole antenna. 17-20 - Fayrouz Haddad, Wenceslas Rahajandraibe, Lakhdar Zaïd, Oussama Frioui, Rachid Bouchakour:
Radio frequency tunable polyphase filter design. 21-24 - Johannes Uhlig, René Schüffny, Harald Neubauer, Johann Hauer, Joachim Haase:
A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager. 33-36 - Enrique Prefasi, Ernesto Pun, Luis Hernández, Susana Patón:
Second-order multi-bit ΣΔ ADC using a Pulse-Width Modulated DAC and an integrating quantizer. 37-40 - Mohammad Hossein Maghami, Mohammad Yavari:
A double-sampled hybrid CT/DT SMASH ΣΔ modulator for wideband applications. 41-44 - Maarten De Bock, Pieter Rombouts:
A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR. 45-48 - Mahdi Kashmiri, Kofi A. A. Makinwa, Lucien J. Breems:
A multi-bit cascaded sigma-delta modulator with an oversampled single-bit DAC. 49-52 - Marco Bucci, Luca Giancane, Raimondo Luzzi, Giuseppe Scotti, Alessandro Trifiletti:
Delay-based dual-rail pre-charge logic. 53-56 - Massimo Alioto, Gaetano Palumbo, Melita Pennisi:
Analysis of the impact of random process variations in CMOS tapered buffers. 57-60 - Alexander Skavantzos, Mohammad Abdallah, Thanos Stouraitis, Dimitrios M. Schinianakis:
Design of a balanced 8-modulus RNS. 61-64 - Yngvar Berg:
Novel high speed and ultra low voltage CMOS flip-flop. 65-68 - Alain J. Martin:
Asynchronous logic for high variability nano-CMOS. 69-72 - Laurent Remy, Philippe Coll, Fabrice Picot, Philippe Mico, Jean-Michel Portal:
Definition of an innovative filling structure for digital blocks : the DFM filler cell. 73-76 - Patrik Kimfors, Niklas Broman, Andreas Haraldsson, Kasyab P. Subramaniyan, Magnus Själander, Henrik Eriksson, Per Larsson-Edefors:
Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree. 77-80 - Cristiano Lazzari, Adriel Ziesemer, Ricardo Reis:
An automated design methodology for layout generation targeting power leakage minimization. 81-84 - Massimo Alioto, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti:
Leakage Power Analysis attacks: Theoretical analysis and impact of variations. 85-88 - Sebastian M. Londono, José Pineda de Gyvez:
An energy-aware multiplier based on a Configurable-Reuse of points design methodology. 89-92 - Fuminori Kobayashi, Yuhta Egashira, Hitoshi Kondoh:
A PLL configuration for reducing both incoming and inherent jitters. 93-96 - Vassilios A. Chouliaras, Panagiotis Galiatsatos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
Efficient cascaded VLSI FFT architecture for OFDM systems. 97-100 - Mohamed A. Abd El-Ghany, Magdy A. El-Moursy, Darek Korzec, Mohammed Ismail:
High Throughput architecture for OCTAGON Network on Chip. 101-104 - Mohamed A. Abd El-Ghany, Magdy A. El-Moursy, Darek Korzec, Mohammed Ismail:
Power efficient Networks on Chip. 105-108 - Thaísa Leal da Silva, Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini:
High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard. 109-112 - Kazeem Alagbe Gbolagade, Sorin Dan Cotofana:
A reverse converter for the new 4-moduli set {2n + 3, 2n + 2, 2n + 1, 2n}. 113-116 - Ahmet Korhan Tanc, Ender Mete Eksioglu, Ahmet H. Kayran:
Adaptive multirate signal estimation with lattice orthogonalization. 117-119 - Marta Turrillas, Ainhoa Cortés, Igone Vélez, Juan F. Sevillano, Andoni Irizar:
An FFT core for DVB-T2 receivers. 120-123 - Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine:
A new horizontal and vertical common subexpression elimination method for multiple constant multiplication. 124-127 - Davide Marano, Gaetano Palumbo, Salvatore Pennisi:
An efficient RNM compensation topology with voltage buffer and nulling resistors for large-capacitive-load three-stage OTAs. 128-131 - Davide Marano, Gaetano Palumbo, Salvatore Pennisi:
A high-speed low-power output buffer amplifier for large-size LCD applications. 132-135 - George Raikos, Spiridon Vlassis:
Low-voltage differential amplifier. 136-139 - Tomoki Iida, Tetsuya Asai, Eiichi Sano, Yoshihito Amemiya:
Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers. 140-143 - Yngvar Berg:
Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters. 144-147 - G. A. V. Sai Praneeth, Anil K. Saini:
A self biased operational amplifier at ultra low power supply voltage. 152-154 - Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi:
Exploitation of the phasor approach for closed-form solution of the Van der Pol's oscillator and sinusoidal oscillators with high-order nonlinearity. 155-158 - George Raikos, Spiridon Vlassis:
Low-voltage CMOS voltage squarer. 159-162 - Andrzej Pulka, Lukasz Golly:
A heterogenous approach to symbolic calculations based on structural numbers. 163-166 - Ulkarsh Shah, Kamal El-Sankary, Ezz I. El-Masry:
A charge sampling baseband filter using a new high linearity Gm for multimode receiver. 171-174 - Zihua Qu, Meng Zhang, Jianhui Wu:
A switched-capacitor CMOS voltage reference for ultra low-voltage and ultra low-power operation. 175-178 - Zhiqiang Gao, Jinxiang Wang, Fengchang Lai, Mingyan Yu, Zhongzhao Zhang:
Wideband reconfigurable CMOS Gm-C filter For wireless applications. 179-182 - Murat Isikhan, Torsten Reich, André Richter, Eckhard Hennig:
A new low voltage bandgap reference topology. 183-186 - Marcello De Matteis, Tommaso Vergine, Giuseppe Cocciolo, Andrea Baschirotto, Matteo Conta:
A programmable active-RC complex filter for wireless communications. 187-190 - Marcello De Matteis, Stefano D'Amico, Piero Andriulo, Giuseppe Cocciolo, Andrea Baschirotto:
A 4th order CMOS 65nm wideband low power analog filter for wireless receivers. 191-194 - Christian Jesús B. Fayomi, Gilson I. Wirth, David M. Binkley, Akira Matsuzawa:
An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS. 195-198 - Nabil Ghannay, Abdelaziz Samet:
E-Shaped Patch Antenna modeling with MoM and RWG basis functions. 199-202 - Davide Dermit, Fabio Ducati, Damenico Balsamo, Paolo Lucchi, Mattia Borgarino, Gilles Jacquemod:
A 130nm CMOS tunable digital frequency divider for dual-band microwave radiometer. 203-206 - Alexandru Gheorghe, Florin Constantinescu, Miruna Nitescu:
Error control in circuit transient analysis. 207-210 - Gihad Elamary, E. Graeme Chester, Jeffrey A. Neasham:
An analysis of wireless inductive coupling for High Data Rate biomedical telemetry using a new VHDL n-PSK modulator. 211-214 - Karol Grandez, Paul Bustamante, Gonzalo Solas, Iñaki Gurutzeaga, Andrés Garcia-Alonso:
Wearable wireless sensor for the gait monitorization of Parkinsonian patients. 215-218 - Takamoto Watanabe, Tomohito Terasawa:
An all-digital ADC/TDC for sensor interface with TAD architecture in 0.18-µm digital CMOS. 219-222 - Paul-Vahe Cicek, Sareh Mahdavi, Frederic Nabki, Mourad N. El-Gamal:
Low actuation voltage silicon carbide RF switches for MEMS above IC. 223-226 - Marco Grassi, Vincenzo Ferragina, Piero Malcovati, Stefano Caccia, Giuseppe Bertuccio, Didier Martin, Paolo Bastia, Ivan Cappelluti, Nicoletta Ratti:
A 32 × 32 channels, 3-cm2, 555-mW chip for X-ray pixel detector read-out. 227-230 - Bouzid Mhamdi, Khaled Grayaa, Taoufik Aguili:
An inverse scattering approach using hybrid PSO-RBF network for microwave imaging purposes. 231-234 - Samuel Riviere, Frédéric Alicalapa, Alexandre Douyère, Jean-Daniel Lan Sun Luk, Brigitte Grondin-Perez:
An integrated model of a wireless power transportation for RFID and WSN applications. 235-238 - Bernardo Leite, Eric Kerherve, Jean-Baptiste Bégueret, Didier Belot:
Shielding structures for millimeter-wave integrated transformers. 239-242 - Tvrtko Mandic, Filip Vanhee, Renaud Gillon, Johan Catrysse, Adrijan Baric:
Equivalent circuit model of the TEM cell electric and magnetic field coupling to microstrip lines. 247-250 - Elisenda Roca, Mourad Fakhfakh, Rafael Castro-López, Francisco V. Fernández:
Applications of evolutionary computation techniques to analog, mixed-signal and RF circuit design - an overview. 251-254 - Ivick Guerra-Gómez, Esteban Tlelo-Cuautle, Trent McConaghy, Georges G. E. Gielen:
Optimizing current conveyors by evolutionary algorithms including differential evolution. 259-262 - Yann Cooren, Patrick Siarry, Mourad Fakhfakh:
Application of MO-TRIBES to the design of analog electronic circuits. 263-266 - Bo Liu, Francisco V. Fernández, Dimitri de Jonghe, Georges G. E. Gielen:
Less expensive and high quality stopping criteria for MC-based analog IC yield optimization. 267-270 - Takamoto Watanabe, Shigenori Yamauchi, Tomohito Terasawa:
A 0.0027-mm2 9.5-bit 50-MS/s all-digital A/D converter TAD in 65-nm digital CMOS. 271-274 - Massimo Alioto, Elio Consoli, Gaetano Palumbo:
Optimum clock slope for flip-flops within a clock domain: Analysis and a case study. 275-278 - Andrea Cantillo, Antonietta De Nardo, Nicola Femia, Walter Zamboni:
Scoring criteria for the selection of capacitors in DC to DC converters design. 287-290 - Chun-Yu Hsieh, Young-Sheng Wei, Ke-Horng Chen, Tseng-Chun Lin:
Efficienct LED driver with an adaptive reference tracking technique. 291-294 - Andrea Cantillo, Antonietta De Nardo, Nicola Femia, Walter Zamboni:
A unified model for filter capacitor constraints in DC to DC switching converters design. 295-298 - Massimo Ferri, Daria Pinna, Piero Malcovati, Enrico Dallago, Giulio Ricotti:
Integrated stabilized photovoltaic energy harvester. 299-302 - Zoran Stamenkovic, Emilija Miletic, Milos Obrknezev, Klaus Tittelbach-Helmrich:
MAC protocol implementation in RF-MIMO WLAN. 303-306 - Amel Haji, Asma Ben Letaifa, Sami Tabbane:
Integration of WLAN, UMTS and WiMAX in 4G. 307-310 - Rami Ben Amira, Dorra Ayadi, Inès Kammoun, Mourad Loulou:
Methodology of a system level design for a Cognitive Radio receiver "application for IEEE 802.22 Standard". 319-322 - Anargyros Drolapas, George Lentaris, Dionysios I. Reisis:
Programmable Motion Estimation architecture. 323-326 - Mohamad Adnan Al-Alaoui:
Discretization methods of fractional parallel PID controllers. 327-330 - Marcelo Schiavon Porto, Sergio Bampi, João S. Altermann, Eduardo Costa:
Power efficient architecture for motion estimation using the QSDS-DIC algorithm. 331-334 - Abdelaziz Trabelsi, Mounir Boukadoum, François-Raymond Boyer:
Robust estimation of LP parameters in white noise with unknown variance. 335-338 - Eslam Yahya, Laurent Fesquet:
Asynchronous design: A promising paradigm for electronic circuits and systems. 339-342 - Jim D. Garside, Stephen B. Furber, Steve Temple, Viv Woods:
The Amulet chips: Architectural development for asynchronous microprocessors. 343-346 - Jens Sparsø:
Current trends in high-level synthesis of asynchronous circuits. 347-350 - Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet:
Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks. 351-354 - Mohammed Alshaikh, David Kinniment, Alex Yakovlev:
On the trade-off between resolution time and delay times in bistable circuits. 355-358 - Rolf Becker, Vinzenz Maurer, Roland Ryter:
Multi-mode baseband transmit path for EDGE, TD-SCDMA, and WCDMA in 45-nm CMOS. 359-362 - Chun-Yu Hsieh, Chih-Yu Yang, Ke-Horng Chen:
A low-dropout regulator with smooth peak current control (SPCC) topology for over current protection. 363-366 - Tien-Yu Lo, Chih-Lung Kuo, Chung-Chih Hung, Chi-Hsiang Lo:
A 250MHz Gm-C filter using negative current feedback OTAs. 367-370 - Hoi Lee:
A low-voltage low-power comparator With current-controlled dynamically-biased preamplifiers For DCM buck regulators. 371-374 - Annajirao Garimella, Paul M. Furth:
A 1.21V, 100mA, 0.1µF-10µF output capacitor low drop-out voltage regulator for SoC applications. 375-378 - Oualid Hammi, Fadhel M. Ghannouchi:
Comparative study of recent advances in power amplification devices and circuits for wireless communication infrastructure. 379-382 - Chokri Jebali, Ali Gharsallah, Noureddine Boulejfen, Fadhel M. Ghannouchi:
Performance assessment of RF power amplifier memory polynomial models under different signal statistics. 383-386 - Kimia Taghizadeh Ansari, Calvin Plett, Mustapha C. E. Yagoub:
A low-power 0.4-22GHz CMOS cascode distributed amplifier for optical communication systems. 387-390 - Mohamed Gamal El Din, Bernd Geck, Hermann Eul:
Improved inverse class-E matching network for microwave high power amplifiers. 391-394 - Sahel Abdinia, Mohammad Yavari:
A new architecture for low-power high-speed pipelined ADCs using double-sampling and opamp-sharing techniques. 395-398 - Zhiguo Song, Caroline Lelandais-Perrault, Philippe Bénabès:
Synthesis of complex subband Hybrid Filter Banks A/D converters using adaptive filters. 399-402 - Mehdi Saberi, Reza Lotfi:
Analysis of the linearity of pipelined ADC due to capacitor non-linearity. 403-406 - Stefano D'Amico, Marcello De Matteis, Franco Grancagnolo, Marco Panareo, Roberto Perrino, Gabriele Chiodini, Alessandro Corvaglia, Giuseppe Cocciolo, Andrea Baschirotto:
A low power 0.13µm ADC for drift chambers. 407-410 - Ehsan Rahiminejad, Reza Lotfi:
A low-power architecture for integrating analog-to-digital converters. 411-414 - Dimitris Bekiaris, Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi:
A design methodology for high-performance and low-leakage fixed-point transpose FIR filters. 415-418 - Carlos Diego Moreno-Moreno, Francisco J. Quiles, Manuel Ortiz, María Brox, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Efficient mapping on FPGA of convolution computation based on combined CSA-CPA accumulator. 419-422 - Pedro Echeverría, Marisa López-Vallejo, Walter Bolognesi, Carlos A. López-Barrio:
Exploring performance-power trade-offs for look-up tables in SRAM-based FPGAs. 423-426 - Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini:
Two level decomposition based matrix multiplication for FPGAs. 427-430 - Rui Marcelino, Horácio C. Neto, João M. P. Cardoso:
Unbalanced FIFO sorting for FPGA-based systems. 431-434 - Atef Allam, Ian O'Connor, Emmanuel Drouard, Fabien Mieyeville, Alberto Scandurra:
Optical NoC design-parameters exploration and analysis. 435-438 - Yassine Aydi, Ramzi Tligue, Maissa Elleuch, Mohamed Abid, Jean-Luc Dekeyser:
A multi level functional verification of multistage interconnection network for MPSOC. 439-442 - Ning Chen, Bing Li, Ulf Schlichtmann:
Sensitivity based parameter reduction for statistical analysis of circuit performance. 443-446 - Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis:
On the accuracy of Elmore-based Delay Models. 447-450 - Raimund Ubar, Dmitri Mironov, Jaan Raik, Artur Jutman:
Structurally synthesized multiple input BDDs for simulation of digital circuits. 451-454 - Rammal Hussein, Olleik Charif, Najib Fadlallah, Mohamed Rammal, Patrick Vaudon:
General synthesis method for cylindrical antenna arrays for directive and conformal pattern. 455-458 - L. Gargouri, Ridha Ghayoula, Najib Fadlallah, Ali Gharsallah, Mohamed Rammal:
Steering an adaptive antenna array by LMS algorithm. 459-462 - Nicolae Chiurtu, Jaouhar Ayadi:
Multi-User multiple antenna systems in Up-Link OFDM communications. 463-466 - Yosra Mlayeh, Fatma Rouissi, Fethi Tlili, Adel Ghazel:
Improvement technique of channel estimation in OFDM-MIMO systems. 467-470 - Ali Mohammadi, Adib Abrishamifar, Ahmad Ayatollahi:
A novel CMOS all-pass tunable phase shifter. 471-474 - Mustafa M. El-Muradi, Mohamed A. El-Mansouri:
Modelling and analysis of scaled MOSFET devices and circuit simulation. 475-478 - Wei Xuan, Françis Calmon, Nicolas Baboux, Abdelkader Souifi:
Discussion on the performances of hybrid SET-MOSFET Voltage Controlled Oscillators. 479-482 - Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Renaud Daviot:
Reconfigurable nanoscale logic cells : a comparison study. 483-486 - Kamel Dabboussi, Jalel Zrida:
A dilated LMI approach to robust H∞ static state feedback controller synthesis. 491-494 - Kamel Ben Hamouda, Anis Sellami, Mekki Ksouri:
A chattering free control approach based on dynamical multi-sliding surfaces. 495-498 - Rafael Trapani Possignolo, Omar Hammami:
Optimized joint NARX ANN - embedded processor design methodology. 499-502 - Nazrul Anuar, Yasuhiro Takahashi, Toshikazu Sekine:
Fundamental logics based o