Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Energy optimization of tapered buffers for CMOS on-chip switching power ..."

Gerard Villar et al. (2005)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2005.1465620

access: closed

type: Conference or Workshop Paper

metadata version: 2022-06-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/VillarAMGP05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/VillarAMGP05
Gerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda:
Energy optimization of tapered buffers for CMOS on-chip switching power converters. ISCAS (5) 2005: 4453-4456

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.