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ORCIDEnrique Prefasi
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- affiliation: Carlos III University, Madrid, Spain
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2020 – today
- 2024
[j9]Pablo Jiménez-Fernández, Alberto Rodríguez-Pérez, Enrique Prefasi, Francisco Sierra, Rocío del Río, Oscar Guerra:
An LC-tank based DCO for low-power high-speed applications using full-custom nMOS-type varactors. Microelectron. J. 153: 106398 (2024)- 2023
- [c26]Pedro Barba
, Alberto Rodríguez-Pérez, Enrique Prefasi, Rocío del Río, Oscar Guerra:
ADC Architectural Study for Digitally-Assisted Multi-Gigabit Data Communication Transceivers. DCIS 2023: 1-5 - 2022
- [c25]Pablo Jiménez-Fernández, Alberto Rodríguez-Pérez, Enrique Prefasi, Oscar Guerra, Rocío del Río:
A Novel Design Methodology for Low-Power, Low-Noise LC-Based Digital-Controlled Oscillators. ICECS 2022 2022: 1-4 - 2021
- [j8]A. Rodríguez-Pérez, Luis M. Torres, Enrique Prefasi, Rubén Pérez de Aranda Alonso:
Multi-Gigabit Transceivers for Optical Data Communications From the Standardization Perspective. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 56-62 (2021) - 2020
- [c24]A. Rodríguez-Pérez, Rubén Pérez de Aranda Alonso, Enrique Prefasi, J. San Pablo, S. Dumont, J. Rosado, I. Enrique, P. Pinzón, D. Ortiz:
Towards the Multi-Gigabit Ethernet for the Automotive Industry. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j7]Christopher Rogi, Cesare Buffa, Niccolò de Milleri, Richard Gaggl, Enrique Prefasi:
A Fully-Differential Switched-Capacitor Dual-Slope Capacitance-To-Digital Converter (CDC) for a Capacitive Pressure Sensor. Sensors 19(17): 3673 (2019) - [c23]Christopher Rogi, Rubén Garvi, Enrique Prefasi:
A 1-1 MASH using two Noise-Shaping Switched-Capacitor Dual-Slope converters. PRIME 2019: 129-132 - 2018
- [c22]Christopher Rogi, Enrique Prefasi, Richard Gaggl:
A Low-Power Auto-Zero Switched-Capacitor Dual-Slope Noise-Shaping Direct CDC. ESSCIRC 2018: 198-201 - [c21]Rubén Garvi, Enrique Prefasi:
A Novel Multi-Bit Sigma-Delta Modulator using an Integrating SAR Noise-Shaped Quantizer. ICECS 2018: 809-812 - [c20]Luis Hernández, Enrique Prefasi, Susana Patón, Eric Gutierrez:
VCO-ADC Resolution Enhancement Using Maximum Length Sequences. ISCAS 2018: 1-4 - 2017
- [j6]J. P. Sanjurjo, Enrique Prefasi, Cesare Buffa, Richard Gaggl:
A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications. Sensors 17(6): 1312 (2017) - [c19]S. Paton, Enrique Prefasi, M. Dominguez-Suarez, Marta Portela-García:
A low-IF bandpass ΣΔ ADC for fully-integrated CMOS magnetic resonance imaging receivers. MWSCAS 2017: 1509-1512 - 2016
- [c18]J. P. Sanjurjo, Enrique Prefasi, Cesare Buffa, Richard Gaggl:
An energy-efficient 17-bit noise-shaping Dual-Slope Capacitance-to-Digital Converter for MEMS sensors. ESSCIRC 2016: 389-392 - 2014
- [c17]Enrique Prefasi, Eric Gutierrez, Luis Hernández, Susana Patón, Sergio Walter, Ulrich Gaier:
A 0.03mm2, 40nm CMOS 1.5GS/s all-digital complementary PWM-GRO. ICECS 2014: 116-119 - 2013
- [c16]Luis Hernández, Enrique Prefasi, Susana Patón:
A distortion corrected passive RC noise shaping ADC for biomedical applications. ISCAS 2013: 590-593 - [c15]Juan A. Torreño, Susana Patón, Luis Hernández, Enrique Prefasi, M. Presicce, G. Paoli:
A multi-stage and time-based continuous time ΣΔ Architecture using a Gated Ring Oscillator. ISCAS 2013: 1043-1046 - 2012
- [c14]Luis Hernández, Enrique Prefasi, Susana Patón, Pieter Rombouts:
Analysis of VCO based noise shaping ADCs linearized by PWM modulation. ICECS 2012: 352-355 - 2011
- [j5]Enrique Prefasi, Susana Patón, Luis Hernández:
A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 0.08 mm 2 65 nm CMOS Circuit. IEEE J. Solid State Circuits 46(7): 1562-1574 (2011) - [c13]Francesco Cannillo, Enrique Prefasi, Luis Hernández, Ernesto Pun, Refet Firat Yazicioglu, Chris Van Hoof:
1.4V 13μW 83dB DR CT-ΣΔ modulator with Dual-Slope quantizer and PWM DAC for biopotential signal acquisition. ESSCIRC 2011: 267-270 - 2010
- [c12]Enrique Prefasi, Susana Patón, Luis Hernández, Richard Gaggl, Andreas Wiesbauer, Joerg Hauptmann:
A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS. ESSCIRC 2010: 430-433 - [c11]Luis Hernández, Jorge Fernández, Enrique Prefasi, Susana Patón:
A time encoded decimation filter for noise shaped power DACs. ISCAS 2010: 289-292 - [c10]Susana Patón, Juan A. Torreño, Enrique Prefasi, Luis Hernández:
Continuous Time Cascade Sigma Delta Modulator without digital cancellation filters. ISCAS 2010: 4009-4012
2000 – 2009
- 2009
- [j4]Enrique Prefasi, Luis Hernández, Susana Patón, Andreas Wiesbauer, Richard Gaggl, Ernesto Pun:
A 0.1 mm2, Wide Bandwidth Continuous-Time ΔΣ ADC Based on a Time Encoding Quantizer in 0.13 µm CMOS. IEEE J. Solid State Circuits 44(10): 2745-2754 (2009) - [j3]Luis Hernández, Enrique Prefasi, Ernesto Pun, Susana Patón:
A 1.2-MHz 10-bit Continuous-Time Sigma-Delta ADC Using a Time Encoding Quantizer. IEEE Trans. Circuits Syst. II Express Briefs 56-II(1): 16-20 (2009) - [c9]Enrique Prefasi, Ernesto Pun, Luis Hernández, Susana Patón:
Second-order multi-bit ΣΔ ADC using a Pulse-Width Modulated DAC and an integrating quantizer. ICECS 2009: 37-40 - 2008
- [j2]Luis Hernández, Enrique Prefasi:
Analog-to-Digital Conversion Using Noise Shaping and Time Encoding. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(7): 2026-2037 (2008) - [c8]Enrique Prefasi, Stijn Reekmans, Luis Hernández:
A one-path quadrature bandpass ΣΔ modulator based on distributed resonators at 25 MHz IF. ICECS 2008: 1123-1126 - [c7]Luis Hernández, Susana Patón, Enrique Prefasi:
An A/D converter based on pulse width modulation and the walsh-hadamard transform. ICECS 2008: 1217-1220 - [c6]Luis Hernández, Enrique Prefasi:
A subsampling bandpass SigmaDelta modulator with lumped and distributed resonators. ISCAS 2008: 1652-1655 - 2007
- [j1]Stijn Reekmans, Luis Hernández, Enrique Prefasi:
A Subsampling Quadrature Σ∆ Modulator Based on Distributed Resonators for Use in Radio Receiver. IEEE Trans. Circuits Syst. II Express Briefs 54-II(9): 820-824 (2007) - 2006
- [c5]Susana Patón, Manuel Sanchez-Renedo, Luis Hernández, Enrique Prefasi, Andreas Wiesbauer, Antonio Di Giandomenico, David San Segundo:
Design of Cascaded Continuous-Time Sigma-Delta Modulators. ICECS 2006: 50-53 - [c4]Luis Hernández, Enrique Prefasi:
Analog to digital conversion using a Pulse Width Modulator and an irregular sampling decoder. ICECS 2006: 716-719 - [c3]Luis Hernández, Enrique Prefasi, Pieter Rombouts:
A continuous-time band-pass Sigma Delta modulator implemented in 0.35µm BiCMOS using transmission lines. ISCAS 2006 - 2005
- [c2]Luis Hernández, Enrique Prefasi, Susana Patón, Pieter Rombouts:
Synthesis of sigma delta modulators employing continuous time delays. ISCAS (4) 2005: 4070-4073 - 2004
- [c1]Luis Hernández, Pieter Rombouts, Enrique Prefasi, Susana Patón, Mario Garcia, Celia López:
A jitter insensitive continuous-time ΣΔ modulator using transmission lines. ICECS 2004: 109-112
Coauthor Index
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