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ORCIDIEEE Transactions on Circuits and Systems - Part I: Regular Papers, Volume 51-I
Volume 51-I, Number 1, January 2004
- Keshab K. Parhi
:
The Editor's Corner. 1-2 - Hui Pan, Asad A. Abidi:
Signal folding in A/D converters. 3-14 - Udaykiran Eduri, Franco Maloberti:
Online calibration of a Nyquist-rate analog-to-digital converter using output code-density histograms. 15-24 - Chung-Yu Wu, Yu-Yee Liow:
New current-mode wave-pipelined architectures for high-speed analog-to-digital converters. 25-37 - Yun Chiu, Cheongyuen W. Tsang, Borivoje Nikolic, Paul R. Gray:
Least mean square adaptive digital background calibration of pipelined analog-to-digital converters. 38-46 - Rocío del Río, José M. de la Rosa, Maria Belen Pérez-Verdú, Manuel Delgado-Restituto, Rafael Domínguez-Castro, Fernando Medeiro, Ángel Rodríguez-Vázquez:
Highly linear 2.5-V CMOS ΣΔ modulator for ADSL+. 47-62 - János Márkus, Gabor C. Temes:
An efficient ΔΣ ADC architecture for low oversampling ratios. 63-71 - Anas A. Hamoui, Kenneth W. Martin:
High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications. 72-85 - Ovidiu Bajdechi, Georges G. E. Gielen, Johan H. Huijsing:
Systematic design exploration of delta-sigma ADCs. 86-95 - Thomas Tille, Jens Sauerbrey, Manfred Mauthe, Doris Schmitt-Landsiedel:
Design of low-voltage MOSFET-only ΣΔ modulators in standard digital CMOS technology. 96-109 - Yasuhiro Sugimoto:
A realization of a below-1-V operational and 30-MS/s sample-and-hold IC with a 56-dB signal-to-noise ratio by applying the current-based circuit approach. 110-117 - Yefim S. Poberezhskiy, Gennady Y. Poberezhskiy:
Sampling and signal reconstruction circuits performing internal antialiasing filtering and their influence on the design of digital receivers and transmitters. 118-129 - Shafiq M. Jamal, Daihong Fu, Mahendra P. Singh, Paul J. Hurst, Stephen H. Lewis:
Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter. 130-139 - Gildas Léger, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas:
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. 140-150 - Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund:
Blind adaptive equalization of mismatch errors in a time-interleaved A/D converter system. 151-158 - Miquel Albiol, José Luis González, Eduard Alarcón:
Mismatch and dynamic modeling of current sources in current-steering CMOS D/A converters: an extended design procedure. 159-169 - Gabriele Gandolfi, Vittorio Colonna, Marzia Annovazzi, Fabrizio Stefani, Andrea Baschirotto:
Self-tuning algorithms for high-performance bandpass switched-capacitor ΣΔ modulators. 170-174 - Giuseppe Bonfini, Andrea S. Brogna, Cristian Garbossa, Luca Colombini, Maurizio Bacci, Stefania Chicca, Franco Bigongiari, Nicola Carlo Guerrini, Giuseppe Ferri:
An ultralow-power switched opamp-based 10-B integrated ADC for implantable biomedical applications. 174-177 - Timo Rahkonen, Janne Aikkila:
Linear phase reconstruction filtering using a hold time longer than one sample period. 178-181 - Roman Genov, Gert Cauwenberghs:
Dynamic MOS sigmoid array folding analog-to-digital conversion. 182-186 - J. Paul A. van der Wagt, Gordon G. Chu, Christine L. Conrad:
A layout structure for matching many integrated resistors. 186-190 - Jurgen Deveugele, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC. 191-195 - Janusz A. Starzyk, Russell P. Mohn, Liang Jing:
A cost-effective approach to the design and layout of a 14-b current-steering DAC macrocell. 196-200 - Peter Kiss, Jesús Arias Álvarez, Dandan Li, Vito Boccuzzi:
Stable high-order delta-sigma digital-to-analog converters. 200-205 - Chee-Kian Ong, Kwang-Ting Cheng, Li-C. Wang:
A new sigma-delta modulator architecture for testing using digital stimulus. 206-213 - Carsten Wegener, Michael Peter Kennedy:
Linear model-based testing of ADC nonlinearities. 213-217
Volume 51-I, Number 2, February 2004
- Francisco Colodro, Antonio Torralba, Jose Luis Mora:
Digital noise-shaping of residues in dual-quantization sigma-delta modulators. 225-232 - Pedro M. Figueiredo, João C. Vital:
Averaging technique in flash analog-to-digital converters. 233-253 - Robert M. Fox, H. J. Ko, William R. Eisenstadt:
Differential log-domain filters with high-gain common-mode feedback. 254-263 - Sebastian Hoyos, Jorge A. García, Gonzalo R. Arce:
Mixed-signal equalization architectures for printed circuit board channels. 264-274 - Paul J. Hurst, Stephen H. Lewis, John P. Keane, Farbod Aram, Kenneth C. Dyer:
Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers. 275-285 - Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen:
A mixed-mode polynomial cellular array processor hardware realization. 286-297 - Un-Ku Moon, Gang Huang:
CMOS implementation of nonlinear spectral-line timing recovery in digital data-communication systems. 298-308 - Adrian P. Ryan, Oliver McCarthy:
A novel pole-zero compensation scheme using unbalanced differential pairs. 309-318 - Bill Toole, Calvin Plett, Mark Cloutier:
RF circuit implications of moderate inversion enhanced linear region in MOSFETs. 319-328 - Spiridon Vlassis, Stylianos Siskos:
Design of voltage-mode and current-mode computational circuits using floating-gate MOS transistors. 329-341 - Thomas Y. W. Choi, Bertram E. Shi, Kwabena A. Boahen:
An ON-OFF orientation selective address event representation image transceiver chip. 342-353 - Giorgos Dimitrakopoulos, Vassilis Paliouras:
A novel architecture and a systematic graph-based optimization methodology for modulo multiplication. 354-370 - Dalia A. El-Dib, Mohamed I. Elmasry:
Modified register-exchange Viterbi decoder for low-power wireless communications. 371-378 - Buyurmaiz Baykal:
Blind matched filter receiver. 379-390 - Francis Chung-Ming Lau, C. K. Michael Tse, Ming Ye, Simon S. F. Hau:
Coexistence of chaos-based and conventional digital communication systems of equal bit rate. 391-408 - Bradley A. Minch:
Synthesis of static and dynamic multiple-input translinear element networks. 409-421 - Vinita Vasudevan:
A time-domain technique for computation of noise-spectral density in linear and nonlinear time-varying circuits. 422-433
Volume 51-I, Number 3, March 2004
- Ángel Rodríguez-Vázquez, Fernando Medeiro, Orla Feely:
Guest Editorial for January 2004 Special Issue. 437-439 - Ayman ElSayed, Mohamed I. Elmasry:
Phase-domain fractional-N frequency synthesizers. 440-449 - Aria Eshraghi, Terri S. Fiez:
A comparative analysis of parallel delta-sigma ADC architectures. 450-458 - Taeik Kim, Xiaoyong Li, David J. Allstot:
Compact model generation for on-chip transmission lines. 459-470 - Bosco H. Leung:
A novel model on phase noise of ring oscillator based on last passage time. 471-482 - Kishore A. Kotteri, Amy E. Bell, Joan Carletta:
Design of multiplierless, high-performance, wavelet filter banks with image compression applications. 483-494 - Hamid Mahmoodi-Meimand, Kaushik Roy:
Diode-footed domino: a leakage-tolerant high fan-in dynamic circuit design style. 495-503 - Keshab K. Parhi:
An improved pipelined MSB-first add-compare select unit structure for Viterbi decoders. 504-511 - Keshab K. Parhi:
Eliminating the fanout bottleneck in parallel long BCH encoders. 512-516 - Fan Xu, Alan N. Willson Jr.:
Efficient hardware architectures for eigenvector and signal subspace estimation. 517-525 - Fiorenzo Filippetti, Marcello Artioli:
IMe: 4-term formula method for the symbolic analysis of linear circuits. 526-538 - Ian A. Hiskens:
Power system modeling for inverse problems. 539-551 - Wu-Sheng Lu, Tapio Saramäki, Robert Bregovic:
Design of practically perfect-reconstruction cosine-modulated filter banks: a second-order cone programming approach. 552-563 - Shek-Wai Ng, Yim-Shu Lee:
A unified small-signal simulation algorithm for SMPS. 564-572 - Sang Yoon Park, Nam Ik Cho:
Fixed-point error analysis of CORDIC processor based on the variance propagation formula. 573-584 - Gang Wei, Fangjiong Chen:
Blind identification of IIR systems based on special SIMO model. 585-597 - Jacek Wojciechowski, Leszek J. Opalski, Krzysztof Zamlynski:
Design centering using an approximation to the constraint region. 598-607 - Pavel Zahradnik, Miroslav Vlcek:
Fast analytical design algorithms for FIR notch filters. 608-623
Volume 51-I, Number 4, April 2004
- Andreas Demosthenous, John Taylor, Iasonas F. Triantis, Robert Rieger, Nick Donaldson:
Design of an adaptive interference reduction system for nerve-cuff electrode recording. 629-639 - Pedro Julián, Andreas G. Andreou, Laurence Riddle, Shihab Shamma, David H. Goldberg, Gert Cauwenberghs:
A comparative study of sound localization algorithms for energy aware sensor network nodes. 640-648 - Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, Juan Ramos-Martos, Joaquín Ceballos-Cáaceres, J. M. Mora-Merchan, Alejandro Linares-Barranco:
A precise 90° quadrature OTA-C oscillator tunable in the 50-130-MHz range. 649-663 - Sebastian Magierowski, Stefan Zukotynski:
CMOS LC-oscillator phase-noise analysis using nonlinear models. 664-677 - János Márkus, José B. Silva, Gabor C. Temes:
Theory and applications of incremental ΔΣ converters. 678-690 - Chih-Jen Yen, Wen-Yaw Chung, Mely Chen Chi:
Micro-power low-offset instrumentation amplifier IC design for biomedical system applications. 691-699 - Robert Chen-Hao Chang, Beng-Huat Lim:
Efficient IP routing table VLSI design for multigigabit routers. 700-708 - Thomas Conway:
Galois field arithmetic over GF(pm) for high-speed/low-power error-control applications. 709-717 - George I. Bourdopoulos, Aristodemos Pnevmatikakis, Theodore L. Deliyannis:
Numerical method for determining the quantization error PDF of single-bit ΣΔ Modulators. 718-731 - Tommy W. S. Chow, Sitao Wu:
An online cellular probabilistic self-organizing map for static and dynamic data sets. 732-747 - Renato Mariz de Moraes, Steven Mark Anlage:
Effects of UHF stimulus and negative feedback on nonlinear circuits. 748-754 - Martin J. Gander, Albert E. Ruehli:
Optimized waveform relaxation methods for RC type circuits. 755-768 - Gang Li, Zixue Zhao:
On the generalized DFIIt structure and its state-space realization in digital filter implementation. 769-778 - Sukhwan Lim, Abbas El Gamal:
Gain fixed pattern noise correction via optical flow. 779-786 - Jinhu Lu, Xinghuo Yu, Guanrong Chen, Daizhan Cheng:
Characterizing the synchronizability of small-world dynamical networks. 787-796 - Paolo Maffezzoni, Angelo Brambilla:
A statistical approach to derive an electrical port model of capacitively coupled interconnects. 797-807 - Saed Samadi, M. Omair Ahmad, M. N. S. Swamy:
Characterization of B-spline digital filters. 808-816 - Mirko Solazzi, Aurelio Uncini:
Spline neural networks for blind separation of post-nonlinear-linear mixtures. 817-829 - Marco Storace, Oscar De Feo:
Piecewise-linear approximation of nonlinear dynamical systems. 830-842
Volume 51-I, Number 5, May 2004
- Bertram E. Shi, Paolo Arena, Ákos Zarándy:
Guest Editorial. 849-850 - Ángel Rodríguez-Vázquez, Gustavo Liñán Cembrano, L. Carranza, Elisenda Roca Moreno, Ricardo Carmona-Galán, Francisco Jiménez-Garrido, Rafael Domínguez-Castro, Servando Espejo-Meana:
ACE16k: the third generation of mixed-signal SIMD-CNN ACE chips toward VSoCs. 851-863 - Csaba Rekeczky, István Szatmári, Dávid Bálya, Gergely Tímár, Ákos Zarándy:
Cellular multiadaptive analogic architecture: a computational framework for UAV applications. 864-884 - David López Vilariño, Csaba Rekeczky:
Implementation of a pixel-level snake algorithm on a CNNUM-based chip set architecture. 885-891 - Samuel Xavier de Souza, Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
Toward CNN chip-specific robustness. 892-902 - Marco Gilli, Mario Biey, Paolo Checco:
Equilibrium analysis of cellular neural networks. 903-912 - Ricardo Carmona-Galán, Francisco Jiménez-Garrido, Carlos M. Domínguez-Matas, Rafael Domínguez-Castro, Servando Espejo-Meana, István Petrás, Ángel Rodríguez-Vázquez:
Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS. 913-925 - Andrew Adamatzky, Paolo Arena, Adriano Basile, Ricardo Carmona-Galán, Ben de Lacy Costello, Luigi Fortuna, Mattia Frasca, Ángel Rodríguez-Vázquez:
Reaction-diffusion navigation robot control: from chemical to VLSI analogic processors. 926-938 - Bertram E. Shi, Tao Luo:
Spatial pattern formation via reaction-diffusion dynamics in 32×32×4 CNN chip. 939-947 - Marco Gilli, Fernando Corinto, Paolo Checco:
Periodic oscillations and bifurcations in cellular nonlinear networks. 948-962 - Alan A. Stocker:
Analog VLSI focal-plane array with dynamic connections for the estimation of piecewise-smooth optical flow. 963-973 - Jonne Poikonen, Ari Paasio:
A ranked order filter implementation for parallel analog processing. 974-987 - Pablo Sergio Mandolesi, Pedro Julián, Andreas G. Andreou:
A scalable and programmable simplicial CNN digital pixel processor architecture. 988-996 - Víctor M. Brea, David López Vilariño, Ari Paasio, Diego Cabello:
Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes. 997-1013 - Róbert Wagner, Ákos Zarándy, Tamás Roska:
Adaptive perception with locally adaptable sensor array. 1014-1023 - Chin-Teng Lin, Chun-Lung Chang, Wen-Chang Cheng:
A recurrent fuzzy cellular neural network system with automatic structure and template learning. 1024-1035
Volume 51-I, Number 6, June 2004
- Chaitanya K. Chava, José Silva-Martínez:
A frequency compensation scheme for LDO voltage regulators. 1041-1050 - Steven K. Dunlap, Terri S. Fiez:
A noise-shaped switching power supply using a delta-sigma modulator. 1051-1061 - Peter Kiss, Vladimir I. Prodanov:
One-tap wideband I/Q compensation for zero-IF filters. 1062-1074 - Jongrit Lerdworatawee, Won Namgoong:
Low-noise amplifier design for ultrawideband radio. 1075-1087 - Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli:
Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators. 1088-1099 - Antonio Vilches, Kristel Fobelets, Kostis Michelakis, Solon Despotopoulos, Christos Papavassiliou, Thomas Hackbarth, Ulf König:
SiGe HMODFET "KAIST" micropower model and amplifier realization. 1100-1105 - Yanni Chen, Keshab K. Parhi:
Overlapped message passing for quasi-cyclic low-density parity check codes. 1106-1113 - Shahid Masud, John V. McCanny:
Reusable silicon IP cores for discrete wavelet transform applications. 1114-1124 - Buyurmaiz Baykal:
Blind channel estimation via combining autocorrelation and blind phase estimation. 1125-1131 - Bogdan J. Falkowski, Cheng Fu:
Family of fast linearly independent ternary arithmetic transforms. 1132-1147 - Mücahit Kozak, Izzet Kale:
Rigorous analysis of delta-sigma modulators for fractional-N PLL frequency synthesis. 1148-1162 - Sen M. Kuo, Hsien-Tsai Wu, Fu-Kun Chen, Madhu R. Gunnala:
Saturation effects in active noise control systems. 1163-1171 - János Levendovszky, Alpár Fancsali:
Real-time call admission control for packet-switched networking by cellular neural networks. 1172-1183 - Yue Ma, Hiroshi Kawakami, Chi K. Tse:
Bifurcation analysis of switched dynamical systems with periodically moving borders. 1184-1193 - Mariane Rembold Petraglia, Paulo Bulkool Batalheiro:
Filter bank design for a subband adaptive filtering structure with critical sampling. 1194-1202 - Angelo Scuderi, Tonio Biondi, Egidio Ragonese, Giuseppe Palmisano:
A lumped scalable model for silicon integrated spiral inductors. 1203-1209 - Nan Xie, Henry Leung:
Reconstruction of piecewise chaotic dynamic using a genetic algorithm multiple model approach. 1210-1222 - Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram:
An efficient formulation for substrate parasitic extraction accounting for nonuniform current distribution. 1223-1233 - Yefim S. Poberezhskiy, Gennady Y. Poberezhskiy:
Corrections to "Sampling and Signal Reconstruction Circuits Performing Internal Antialiasing Filtering and Their Influence on the Design of Digital Receivers and Transmitters". 1234
Volume 51-I, Number 7, July 2004
- G. A. M. Hurkx, Edwin van der Heijden:
Intermodulation distortion of a bipolar common-emitter amplifier with arbitrary emitter impedance and input matching network. 1241-1249 - Hiroo Sekiya, Hirotaka Koizumi, Shinsaku Mori, Iwao Sasase, Jianming Lu, Takashi Yahagi:
FM/PWM control scheme in class DE inverter. 1250-1260 - Tadashi Suetsugu, Marian K. Kazimierczuk:
Analysis and design of class E amplifier with shunt capacitance composed of nonlinear and linear capacitances. 1261-1268