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ORCIDVLSI-DAT 2017: Hsinchu, Taiwan
- 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. IEEE 2017, ISBN 978-1-5090-3969-2
- Chia-Heng Wu, Ting-Sheng Chen, Ding-Yuan Lee, Tsung-Te Liu, An-Yeu Wu:
Low-latency Voltage-Racing Winner-Take-All (VR-WTA) circuit for acceleration of learning engine. 1-4 - Heesu Kim, Joonsang Yu, Kiyoung Choi:
Hybrid spiking-stochastic Deep Neural Network. 1-4 - Tsung-Han Tsai, Yih-Ru Tasi:
Design and implementation of a 3D hand gesture architecture system under complicated environment. 1-4 - Rahul Shrestha:
High-speed and low-power VLSI-architecture for inexact speculative adder. 1-4 - Harry H. Chen:
Enhancing the efficiency and accuracy of cell-aware testing to reach zero defects. 1 - Shi-Yu Huang:
Test strategies for the clock and power distribution networks in a multi-die IC. 1-2 - Yu-Hao Ho, Yo-Wei Chen, Chih-Ming Chang, Kai-Chieh Yang, James Chien-Mo Li:
Robust test pattern generation for hold-time faults in nanometer technologies. 1-4 - Yu Huang, Wu-Tung Cheng:
On designing two-dimensional scan architecture for test chips. 1-4 - Tadashi Kishimoto, Tohru Ishihara
, Hidetoshi Onodera:
On-chip temperature and process variation sensing using a reconfigurable Ring Oscillator. 1-4 - Minhui Ke, Ying Zhang, Jianhui Jiang:
High-level Fault Diagnosis on network-on-chip using path tracking. 1-4 - Shintaro Shinjo, Keigo Nakatani, Jun Kamioka, Ryota Komaru, Shuichi Sakata, Takanobu Fujiwara, Hideyuki Nakamizo, Koji Yamanaka:
Highly integrated RF frontend module for high SHF wide-band massive MIMO in 5G, and switching-mode amplifiers beyond 4G. 1-4 - Wen-Chiang Chen:
ITRI mmWave radio access technology development. 1-5 - Donald Y. C. Lie, Jill C. Mayeda, Jerry Lopez:
Highly efficient 5G linear power amplifiers (PA) design challenges. 1-3 - Arun Venkatachar, S. Rajakumar, M. Chapman, Sajeewan Basuru, Ganapathy Parthasarathy, C.-C. Lin, A. Hegde, T. Li:
Test Knowledge Data Base. 1-4 - Steve Pateras, Ting-Pu Tai:
Automotive semiconductor test. 1-4 - David Pursley, Tung-Hua Yeh:
High-level low-power system design optimization. 1-4 - Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Andrew A. Kennings, Laleh Behjat:
Detailed routing violation prediction during placement using machine learning. 1-4 - Chih-Wei Lee, Hwa-Yi Tseng, Chi-Lien Kuo, Chien-Nan Jimmy Liu, Chin Hsia:
Layout placement optimization with isolation rings for high-voltage VLSI circuits. 1-4 - Wan-Ning Wu, Chen Chen, Ching-Yu Chin, Chun-Kai Wang, Hung-Ming Chen:
An analytical placer for heterogeneous FPGAs via rough-placed packing. 1-4 - Chih-Huei Hou, Soon-Jyh Chang, Hao-Sheng Wu, Huan-Jui Hu, En-Ze Cun:
An 8-bit 400-MS/s calibration-free SAR ADC with a pre-amplifier-only comparator. 1-4 - Yung-Hui Chung, Song-You Shih:
A 10-bit 100-MS/s SAR ADC with capacitor swapping technique in 90-nm CMOS. 1-4 - Chung-Cheng Su, Cheng-Chung Lin, Chung-Chih Hung:
An all-digital phase-locked loop with a multi-delay-switching TDC. 1-4 - Lee Chuang, Chun-Chang Wu, Wei-Heng Wang, Shey-Shi Lu:
A solar powered single-inductor dual-output (SIDO) DC-DC boost for power management unit system with high light-load efficiency. 1-4 - Kai-Yu Hu, Bo-Ming Chen, Chien-Hung Tsai:
A digitally controlled buck converter with current sensor-less adaptive voltage positioning (AVP) mechanism. 1-4 - Shao-Yung Lu, Yu-Te Liao:
A 45µW, 9.5MHz current-reused RC oscillator using a swing-boosting technique. 1-4 - Tzu-Ying Chen, Yi-Lin Tsai, Tsung-Hsien Lin:
A current feedback instrumentation amplifier with chopping and dynamic element matching techniques and employing the current-reuse technique in input/feedback stages. 1-4 - Sheng-Yen Chen, Chia-I Wei, Yu-Chen Chiu, Bo-Cheng Charles Lai:
A Hadoop-based Principle Component Analysis on embedded heterogeneous platform. 1-4 - Yo-Hao Tu, Kai-Wen Yao, Minghao Huang, Yu-Yun Lin, Hao-Yu Chi, Po-Min Cheng, Pei-Yun Tsai, Muh-Tian Shiue, Chien-Nan Liu, Kuo-Hsing Cheng, Jia-Shiang Fu:
A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. 1-4 - Ricky Lee, Tai en Wu, Jiun-In Guo:
An Adaptive Cross-Window stereo camera Distance Estimation technology and its system implementation for multiple applications. 1-4 - Chia-Chi Tsai, Yi-Ting Lai, Yuan-Fu Li, Jiun-In Guo:
A vision radar system for car safety driving applications. 1-4 - Hao Yu:
Energy efficient VLSI circuits for machine learning on-chip. 1 - M. Amimul Ehsan, Zhen Zhou, Yang Yi:
Hybrid three-dimensional integrated circuits: A viable solution for high efficiency Neuromorphic Computing. 1-2 - Hai Li:
Conventional and neuromorphic systems leveraging emerging memory technologies. 1 - Ting-Shuo Hsu, Chao-Chieh Wu, Che-Wei Hsu, Chih-Tsun Huang, Jing-Jia Liou, Yao-Hua Chen, Juin-Ming Lu:
Design space exploration with a cycle-accurate systemC/TLM DRAM controller model. 1-4 - Yun Kae Law, Ing-Chao Lin, Cheng-Chien Lin:
Reducing aging on scratchpad memory using temporal- and FSM-based power management. 1-4 - Yu-Ju Shih, Chih-Tsun Huang, Jing-Jia Liou, Jyu-Yuan Lai, Chih-Wea Wang, Chi-Feng Wu:
Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model. 1-4 - Hsin-Pang Kuo, Alan P. Su, Kuen-Jong Lee:
A low power synthesis flow for multi-rate systems. 1-4 - Hyun-jeong Kwon, Young Hwan Kim:
Utilization of relieved corners from multi-corner libraries in deterministic static timing analysis. 1-4 - Kun-Chih Chen, Yu-Hsien Chen, Yen-Po Lin:
Thermal sensor allocation and full-system temperature characterization for thermal-aware mesh-based NoC system by using compressive sensing technique. 1-4 - Zhen Liang, Bin Li, Mo Huang, Hui Ye, Ken Xu, Yutao Liu, Yan Lu:
A four-band TD-LTE transmitter with wide dynamic range and LPF bandwidth calibration. 1-4 - Hui Ye, Bin Li, Mo Huang, Zhen Liang, Yan Lu:
A digital IQ imbalance self-calibration in FDD transceiver. 1-4 - Chien-Hua Jung, Kea-Tiong Tang:
A 0.9-V 2.36-GHz MedRadio-band 10-Mbps low-power OOK modulator for neural implants. 1-4 - Clement Lin:
Industry 4.0: Open as well as closed. 1 - Cheng-Wen Wu:
Can IOT make semiconductor great again? 1 - Jing-You Lin, Jung-Chun Chi, Chun-Fu Liao, Yuan-Hao Huang:
A 6.4G LLR/s 8×8 64-QAM soft-output MIMO detector with lattice reduction preprocessing. 1-4 - Ching-Che Chung, Yi-Che Tsai, Ming-Chieh Li:
A reference-less all-digital transceiver for human body channel communication. 1-4 - Yu-Hsuan Lin, Shih-Fan Peng, Wei Hwang:
Wide-I/O 3D-staked DRAM controller for near-data processing system. 1-4 - Hirofumi Shinohara, Baikun Zheng, Yanhao Piao, Bo Liu, Shiyu Liu:
Analysis and reduction of SRAM PUF Bit Error Rate. 1-4 - Subramanian S. Iyer:
Heterogeneous SoCs. 1 - Ren C. Luo:
World megatrend of intelligent robotics and AI: Impact on VLSI-DAT. 1 - Asen Asenov, Karim El Sayed, Ricardo Borges, Plamen Asenov, Campbell Millar, Terry Ma:
TCAD based Design-Technology Co-Optimisations in advanced technology nodes. 1-2 - David Eggleston:
New embedded memories, from lab to fab. 1 - Bertrand Bleneau:
Extended abstract: Industrial performance to serve economical rebound. 1-2 - Suhita Devineni:
Building best in class System solutions: Enabled by collaboration. 1 - David Shih:
Collaboration and innovation for your success. 1 - Keh-Ching Huang:
Navigating through the fragmented application maze. 1 - ChiaHua Ho:
RRAM technology and its embedded potential on IoT applications. 1 - John A. Rogers:
Soft electronics for the human body. 1 - Mau-Chung Frank Chang:
Terahertz systems-on-chip enabled by nano-IC technologies. 1 - Shinobu Fujita, Hiroki Noguchi, Kazutaka Ikegami, Susumu Takeda, Kumiko Nomura, Keiko Abe:
Novel memory hierarchy with e-STT-MRAM for near-future applications. 1-2 - Guohan Hu, J. J. Nowak, G. Lauer, J. H. Lee, J. Z. Sun, J. Harms, Anthony J. Annunziata, S. Brown, W. Chen, Y. H. Kim, N. Marchack, Sunil Murthy, Chandrasekharan Kothandaraman, Eugene J. O'Sullivan, J. H. Park, M. Reuter, R. P. Robertazzi, Philip Louis Trouilloud, Y. Zhu, Daniel Christopher Worledge:
Low-current Spin Transfer Torque MRAM. 1-2 - Tetsuo Endoh:
Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs. 1-3 - Takashi Kono:
Embedded non-volatile memory system as an enabler of smarter world. 1-4 - Massimo Alioto:
STT-MRAM memories for IoT applications: Challenges and opportunities at circuit level and above. 1 - Zili Shao:
Utilizing NVDIMM to alleviate the I/O performance gap for big data workloads. 1 - Rob Aitken:
The road to a trillion: Making the IoT work. 1 - Raymond Pao:
Virtual Reality: The new era of the future world. 1
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