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ORCIDFei Li 0015
Person information
- affiliation: A*STAR, Data Storage Institute, Singapore
- affiliation (PhD 2013): Nanyang Technological University, Singapore
Other persons with the same name
- Fei Li — disambiguation page
- Fei Li 0001
![[0000-0003-0879-1401]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-0879-1401")
— George Mason University, Fairfax, VA, USA - Fei Li 0002 — Siemens AG, Vienna, Austria (and 1 more)
- Fei Li 0003 — Microsemi Corporation, Aliso Viejo, CA, USA (and 2 more)
- Fei Li 0004 — Beijing Institute of Radiation Medicine, Beijing, China (and 1 more)
- Fei Li 0005 — Fujitsu Research and Development Center Co., Beijing, China
- Fei Li 0006 — Guangzhou University, Guangzhou, China (and 1 more)
- Fei Li 0007 — Wuhan University, Wuhan, China
- Fei Li 0008 — Zhejiang University, State Key Lab of Fluid Power Transmission and Control, Hangzhou, China
- Fei Li 0009 — Tianjin University, School of Electrical Engineering and Automation, Tianjin, China
- Fei Li 0010 — Anhui University of Finance and Economics, Bengbu City, China
- Fei Li 0011 — Northwestern Polytechnical University, School of Computer Science, Xi'an, China
- Fei Li 0012 — City University London, School of Engineering and Mathematical Sciences, London, UK
- Fei Li 0013 — Virginia Tech, Blacksburg, VA, USA
- Fei Li 0014 — Nanjing University of Posts and Telecommunications, College of Telecommunication and Information Engineering, China
- Fei Li 0016 — Shandong University, School of Information Science and Engineering, Jinan, China
- Fei Li 0017 — Huazhong University of Science and Technology, Department of Electronics and Information Engineering, Wuhan, China
- Fei Li 0018 — Shenyang Aerospace University, Liaoning, China (and 1 more)
- Fei Li 0019 — Anhui University of Technology, Department of Electrical and Information Engineering, Maanshan, China (and 1 more)
- Fei Li 0020 — Beijing University of Posts and Telecommunications, China
- Fei Li 0021 — Wuhan University, Key Laboratory of Aerospace Information Security and Trusted Computing, Wuhan, China
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2020 – today
- 2022
[c8]Qibang Zang, Wang Ling Goh, Fei Li, Lu Lu, Anh Tuan Do:
Temperature Compensation on SRAM-Based Computation in Memory Array. ISOCC 2022: 1-2- 2021
- [j2]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do:
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3148-3152 (2021) - 2020
- [c7]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do:
0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC 2020: 1-4 - [c6]Anh Tuan Do, Xuanyao Fong, Fei Li:
Aggressive Leakage Current Reduction for Embedded MRAM Using Block-Level Power Gating. IECON 2020: 2249-2254 - [c5]Karim Ali, Fei Li, Sunny Y. H. Lua, Chun-Huat Heng:
Energy Efficient Reduced Area Overhead Spin-Orbit Torque Non-Volatile SRAMs. IECON 2020: 2275-2280 - [c4]Aarthy Mani, Fei Li, Ming Ming Wong, Luo Tao, Liwei Yang, Vishnu Paramasivam, Anh Tuan Do:
Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [c3]Fei Li, Ming Ming Wong, Aarthy Mani, Vishnu Paramasivam, Anh-Tuan Do:
0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications. A-SSCC 2019: 141-144 - 2018
- [j1]Karim Ali, Fei Li, Sunny Y. H. Lua, Chun-Huat Heng:
Energy- and Area-Efficient Spin-Orbit Torque Nonvolatile Flip-Flop for Power Gating Architecture. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 630-638 (2018) - [c2]Karim Ali, Fei Li, Sunny Y. H. Lua, Chun-Huat Heng:
Area and Energy Efficient Diode Based Spin Orbit Torque Non-Volatile Latch Design. MWSCAS 2018: 615-618 - 2016
- [c1]Karim Ali, Fei Li, Sunny Y. H. Lua, Chun-Huat Heng:
Compact spin transfer torque non-volatile flip flop design for power-gating architecture. APCCAS 2016: 119-122
Coauthor Index
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