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2020 – today
- 2020
[j16]Syifaul Fuada, Trio Adiono, Lindawani Siregar:
Development of Wireless Control System for Smart Street Lighting using ESP8266. Int. J. Interact. Mob. Technol. 14(15): 68-80 (2020)- [j15]Syifaul Fuada, Trio Adiono, Prasetiyo:
Accuracy Improvement of RSSI-based Distance Localization using Unscented Kalman Filter (UKF) Algorithm for Wi-Fi Tracking Application. Int. J. Interact. Mob. Technol. 14(16): 225-233 (2020) - [j14]Syifaul Fuada, Akhmad Alfaruq, Trio Adiono:
A Portable Electronic Transaction Device Based on Dual Interface Smart Card. Int. J. Online Biomed. Eng. 16(3): 27-45 (2020) - [j13]Syifaul Fuada, Trio Adiono, Fuad Ismail, Erwin Setiawan:
Prototyping the Li-Fi System Based on IEEE 802.15.7 PHY.II.1 Standard Compliance. J. Commun. 15(6): 519-527 (2020)
2010 – 2019
- 2019
- [j12]Erwin Setiawan, Trio Adiono, Syifaul Fuada:
Modelling the OFDM-based PHY Layer in SoC for Visible Light Communication. Int. J. Recent Contributions Eng. Sci. IT 7(3): 79-89 (2019) - [j11]Trio Adiono, Khilda Afifah, Suksmandhira Harimurti
, Prasetiyo, Amy Hamidah Salman:
Fully integrated transceiver module with a temperature compensation for high bit rate contactless smart card. Integr. 64: 92-104 (2019) - [j10]Syifaul Fuada, Trio Adiono, Angga Pratama Putra, Erwin Setiawan:
Design of Reconfigurable System-on-Chip Architecture for Optical Wireless Communication. J. Commun. 14(10): 965-970 (2019) - [j9]Yi-An Chang, Trio Adiono, Amy Hamidah, Shen-Iuan Liu:
An On-Chip Relaxation Oscillator With Comparator Delay Compensation. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 969-973 (2019) - [j8]Trio Adiono, Sinantya Feranti Anindya, Syifaul Fuada, Khilda Afifah, Irfan Gani Purwanda:
Efficient Android Software Development Using MIT App Inventor 2 for Bluetooth-Based Smart Home. Wirel. Pers. Commun. 105(1): 233-256 (2019) - [c50]T. Farhan Iqbal, S. Fitrah Azizah, Shalahuddin Al Ayyubi, Trio Adiono, Waskita Adijarto:
Self-Ordering Machine for Canteen (SELFO). APCCAS 2019: 194-197 - [c49]Trio Adiono, Akhmad Alfaruq, Syifaul Fuada:
Hardware Design of Transaction Device based on Contact and Contactless Smart Card. APCCAS 2019: 277-280 - [c48]Imam M. Dalta, Farida P. Dini Nur, Sanchia Teresa Amaral, Trio Adiono:
Artificial Intelligence Based In-Store Traffic Monitoring System for Evaluating Retail Performance. GCCE 2019: 430-431 - [c47]Willy Anugrah Cahyadi, Yeon Ho Chung, Trio Adiono:
Infrared Indoor Positioning Using Invisible Beacon. ICUFN 2019: 341-345 - [c46]Erwin Setiawan, Trio Adiono:
Throughput Improvement of an Autocorrelation Block for Time Synchronization in OFDM-based LiFi. ISOCC 2019: 219-220 - [c45]Joshua Gunawan, Teresia R. S. Putri, Yashael F. Arthanto, Trio Adiono:
Hardware Architecture of Emotion Recognition from Speech Features using Recurrent Neural Network and Backpropagation Through Time. ISPACS 2019: 1-2 - 2018
- [j7]Trio Adiono, Angga Pradana, Syifaul Fuada:
A Low-complexity of VLC System using BPSK. Int. J. Recent Contributions Eng. Sci. IT 6(1): 99-106 (2018) - [j6]Trio Adiono, Syifaul Fuada, Rosmianto Aji Saputro:
Rapid Development of System-on-Chip (SoC) for Network-Enabled Visible Light Communications. Int. J. Recent Contributions Eng. Sci. IT 6(1): 107-119 (2018) - [j5]Syifaul Fuada, Trio Adiono:
Noise and Bandwidth in Operational Amplifiers for Conventional TIAs used in Visible Light Communication. Int. J. Recent Contributions Eng. Sci. IT 6(2): 37-45 (2018) - [j4]Trio Adiono, Bryan Tandiawan, Syifaul Fuada:
Device Protocol Design for Security on Internet of Things based Smart Home. Int. J. Online Eng. 14(7): 161-170 (2018) - [c44]Trio Adiono, Sinantya Feranti Anindya, Syifaul Fuada, Maulana Yusuf Fathany:
Developing of General IrDa Remote to Wirelessly Control IR-based Home Appliances. GCCE 2018: 461-463 - [c43]Erwin Setiawan, Trio Adiono:
Implementation of Systolic Co-processor for Deep Neural Network Inference based on SoC. ISOCC 2018: 36-37 - [c42]Bobbi Winema Yogatama, Jhonson Lee, Suksmandhira Harimurti, Trio Adiono:
FPGA-based Optical Character Recognition for Handwritten Mathematical Expressions. ISOCC 2018: 42-43 - [c41]Erwin Setiawan, Trio Adiono, Syifaul Fuada:
PHY Layer Design of OFDM-VLC System based on SoC using Reuse Methodology. ISOCC 2018: 115-116 - [c40]Isaac N. Osahon, Ziyan Chen, Trio Adiono, Wasiu O. Popoola:
SI-POF Transmission with OFDM and Sub-carrier Pairwise Coding. PEMWN 2018: 1-5 - [c39]Trio Adiono, Kevin Shidqi Prakoso, Christoporus Deo Putratama, Bramantio Yuwono, Syifaul Fuada:
Practical Implementation of A Real-time Human Detection with HOG-AdaBoost in FPGA. TENCON 2018: 211-214 - [c38]Trio Adiono, Maulana Yusuf Fathany, Sinantya Feranti Anindya, Syifaul Fuada, Irfan Gani Purwanda:
Wirelessly Control for RGB Lamp End-device: Design and Implementation. TENCON 2018: 2066-2070 - 2017
- [j3]Trio Adiono, Syifaul Fuada, Muhamad Luthfi, Rosmianto Aji Saputro:
MAC Layer Design for Network-Enabled Visible Light Communication Systems Compliant with IEEE 802.15.7. EAI Endorsed Trans. Energy Web 4(14): e5 (2017) - [j2]Trio Adiono, Syifaul Fuada:
LED Driver Design for Indoor Lighting and Low- rate Data Transmission Purpose. EAI Endorsed Trans. Energy Web 4(15): 15 (2017) - [j1]Syifaul Fuada, Angga Pratama Putra, Yulian Aska, Trio Adiono:
A First Approach to Design Mobility Function and Noise Filter in VLC System Utilizing Low-cost Analog Circuits. Int. J. Recent Contributions Eng. Sci. IT 5(2): 14-30 (2017) - [c37]Trio Adiono, Hans Ega, Hans Kasan, Carrel Suksmandhira Harimurti:
Fast Warehouse Management System (WMS) using RFID based goods locator system. GCCE 2017: 1-2 - [c36]Trio Adiono, Billy Austen Manangkalangi, Rahmat Muttaqin, Suksmandhira Harimurti, Waskita Adijarto:
Intelligent and secured software application for IoT based smart home. GCCE 2017: 1-2 - [c35]Trio Adiono, Angga Pratama Putra:
Hardware/software model of DCO-OFDM based visible light communication SoC using DMA. ISOCC 2017: 92-93 - [c34]Trio Adiono, Prasetiyo, Suksmandhira Harimurti, Khilda Afifah, Amy Hamidah Salman:
Design of highly stable bandgap reference circuit for RF power harvester module of a 13.56 MHz smart card tag IC. ISOCC 2017: 190-191 - [c33]Syifaul Fuada, Trio Adiono:
Short-range audio transfer through 3 Watt white LED on LoS channels. ISPACS 2017: 398-403 - [c32]Trio Adiono, Hans Ega, Hans Kasan, Syifaul Fuada, Suksmandhira Harimurti:
Full custom design of adaptable montgomery modular multiplier for asymmetric RSA cryptosystem. ISPACS 2017: 910-914 - 2016
- [c31]Trio Adiono, Angga Pradana, Rachmad Vidya Wicaksana Putra, Syifaul Fuada:
Analog filters design in VLC analog front-end receiver for reducing indoor ambient light noise. APCCAS 2016: 581-584 - [c30]Trio Adiono, Maulana Yusuf Fathany, Rachmad Vidya Wicaksana Putra, Khilda Afifah, Muhammad Husni Santriaji, Braham Lawas Lawu, Syifaul Fuada:
Live demonstration: MINDS - Meshed and internet networked devices system for smart home: Track selection: Embedded systems. APCCAS 2016: 736-737 - [c29]Trio Adiono, Radhian Ferel Armansyah, Fadhli Dzil Ikram, Swizya Satira Nolika, Rachmad Vidya Wicaksana Putra, Amy Hamidah Salman:
Parallel morphological template matching design for efficient human detection application. ISPACS 2016: 1-4 - [c28]Trio Adiono, Mahendra Drajat Adhinata, Novi Prihatiningrum, Ricky Disastra, Rachmad Vidya Wicaksana Putra, Amy Hamidah Salman:
An architecture design of SAD based template matching for fast queue counter in FPGA. ISPACS 2016: 1-4 - [c27]Prasetiyo, Rachmad Vidya Wicaksana Putra, Trio Adiono, Amy Hamidah Salman:
Kurtosis and energy based spectrum detection for SDR based RF monitoring system. ISPACS 2016: 1-5 - 2015
- [c26]Andyes Fourman Duta Akbar Sudirja, Trio Adiono:
Small and compact Diversity Combining using selective method for mobile application. ISPACS 2015: 231-234 - [c25]Jason Kurniawan, Nur Ahmadi, Trio Adiono:
Architecture and FPGA implementation of LTE PSS and SSS synchronizer. ISPACS 2015: 235-240 - [c24]Ahmad Zaky Ramdani, Trio Adiono:
A novel algorithm of tail biting convolutional code decoder for low cost hardware implementation. ISPACS 2015: 241-245 - [c23]Rachmad Vidya Wicaksana Putra, Trio Adiono:
Optimized hardware algorithm for integer cube root calculation and its efficient architecture. ISPACS 2015: 263-267 - [c22]Bagus Hanindhito, Hafez Hogantara, Annisa I. Rahmah, Nur Ahmadi, Trio Adiono:
Ultrasonic sensor based contactless theremin using pipeline CORDIC as tone generator. ISPACS 2015: 268-273 - [c21]Angga Pradana, Nur Ahmadi, Trio Adiono, Willy Anugrah Cahyadi, Yeon-ho Chung:
VLC physical layer design based on Pulse Position Modulation (PPM) for stable illumination. ISPACS 2015: 368-373 - [c20]Willy Anugrah Cahyadi, Tong-Il Jeong, Yong-Hyeon Kim, Yeon-ho Chung, Trio Adiono:
Patient monitoring using Visible Light uplink data transmission. ISPACS 2015: 431-434 - [c19]Maulana Yusuf Fathany, Trio Adiono:
Wireless protocol design for smart home on mesh wireless sensor network. ISPACS 2015: 462-467 - [c18]Yacob W. Sitorus, Gabriel Frans, Prasetiyo, Trio Adiono, Amy H. Salman, Nur Ahmadi:
Establishment of Wi-Fi Display session between source and sink device in wireless Android screencasting. ISPACS 2015: 663-668 - 2013
- [c17]Trio Adiono, Ardimas Andi Purwita, Ricky Haryadi, Rella Mareta, Eka Rakhman Priandana:
A hardware-software co-design for a real-time spectral subtraction based noise cancellation system. ISPACS 2013: 5-10 - [c16]Trio Adiono, Nana Sutisna:
Architecture design framework for flexible and configurable WiMAX OFDMA baseband transceiver. ISPACS 2013: 656-661 - 2012
- [c15]Ardimas Andi Purwita, Trio Adiono:
A Four Quadrants Parallel-Recursive 2-D DCT/IDCT VLSI Architecture. ICETET 2012: 233-238 - [c14]Rian Ferdian, Khoirul Anwar, Trio Adiono:
Efficient equalization hardware architecture for SC-FDMA systems without cyclic prefix. ISCIT 2012: 936-941 - [c13]Felis Dwiyasa, Riafeni Karlina, Trio Adiono:
Algorithm and hardware architecture of high accuracy IQ imbalance estimation and compensation for OFDM system. ISPACS 2012: 669-673 - [c12]Trio Adiono, Marvin:
Radix-4 Max-log-MAP parallel turbo decoder architecture with a new cache memory data flow for LTE. ISPACS 2012: 792-797 - 2011
- [c11]A. Pradini, Teuku Muhammad Roffi, R. Dirza, Trio Adiono:
VLSI design of a high-throughput discrete cosine transform for image compression systems. ICEEI 2011: 1-6 - [c10]Ardimas Andi Purwita, Arnaud A. A. Setio, Trio Adiono:
Optimized 8-level turbo encoder algorithm and VLSI architecture for LTE. ICEEI 2011: 1-6 - [c9]Rachmad Vidya Wicaksana Putra, Rella Mareta, Nurfitri Anbarsanti, Trio Adiono:
The efficient mCBE algorithm and quantization numbers for multiplierless and low complexity DCT/IDCT Image Compression Architecture. ICEEI 2011: 1-6 - [c8]Chiranut Sa-ngiamsak, Minoru Okada, Trio Adiono, Piya Kovintavewat, Thanarat H. Chalidabhongse:
Technical program chairs' message. ISPACS 2011: 1 - [c7]Savitri Galih, Trio Adiono, Adit Kurniawan, Iskandar:
Folding Memory Shared Processor Array (FMSPA) Architecture for Channel Estimation of Downlink OFDMA IEEE 802.16e System. PARELEC 2011: 173-178
2000 – 2009
- 2005
- [c6]Trio Adiono, Dani Fitriyanto, Akhmad Mulyanto, Sumek Wisayataksin, Kazumasa Takeichi, Dongju Li, Tati Rajab Mengko, Hiroaki Kunieda:
New Macroblock Engine Architecture for Video Processing. MVA 2005: 68-71 - 2002
- [c5]Trio Adiono, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A new methodology for low delay real-time videophone software architecture design. APCCAS (2) 2002: 269-273 - [c4]Trio Adiono, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Efficient method for face region quality enhancement in low bit rate video coding. APCCAS (1) 2002: 549-553 - 2001
- [c3]Tsuyoshi Isshiki, Chawalit Honsawek, Trio Adiono, Kazuhito Ito, Tomohiko Ohtsuka, Dongju Li, Hiroaki Kunieda:
H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method. ISAS-SCI (1) 2001: 195-200
1990 – 1999
- 1998
- [c2]Tati Rajab Mengko, Trio Adiono, Handoko Setyawan, Rini Setiadarma, Donny A. Hudiansyah:
Design and Implementation of Real Time System for Object Detection and Classification on Parallel Virtual Machine. MVA 1998: 535-538 - 1996
- [c1]Yudi Yanuhardi, Trio Adiono, Tati Rajab Mengko:
TMP5X5T1M: A Configurable Binary Morphological and Template Matching Processor. MVA 1996: 174-177
Coauthor Index
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