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ORCIDAlessio Spessot
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2020 – today
- 2024
[c21]J. P. Bastos, Barry J. O'Sullivan, Yusuke Higashi, Adrian Vaisman Chasin, Jacopo Franco, Hiroaki Arimura, J. Ganguly, Elena Capogreco, Alessio Spessot, N. Horiguchi:
Side and Corner Region Non-Uniformities in Grown SiO2 and Their Implications on Current, Capacitance and Breakdown Characteristics. IRPS 2024: 36- 2022
- [j1]Ji-Yung Lin
, Pieter Weckx, Subrat Mishra, Alessio Spessot, Francky Catthoor:
Multitimescale Mitigation for Performance Variability Improvement in Time-Critical Systems. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1757-1769 (2022) - [c20]Ji-Yung Lin, Pieter Weckx, Subrat Mishra, Alessio Spessot, Francky Catthoor:
Proactive Run-Time Mitigation for Time-Critical Applications Using Dynamic Scenario Methodology. DATE 2022: 616-621 - [c19]Alessio Spessot, Shairfe Muhammad Salahuddin, Ricardo Escobar, Romain Ritzenthaler, Yang Xiang, Rahul Budhwani, Eugenio Dentoni Litta, Elena Capogreco, Joao Bastos, Yangyin Chen, Naoto Horiguchi:
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations. IMW 2022: 1-4 - [c18]J. P. Bastos, Barry J. O'Sullivan, Jacopo Franco, Stanislav Tyaginov, Brecht Truijen, Adrian Vaisman Chasin, Robin Degraeve, Ben Kaczer, Romain Ritzenthaler, Elena Capogreco, E. Dentoni Litta, Alessio Spessot, Yusuke Higashi, Y. Yoon, V. Machkaoutsan, Pierre Fazan, N. Horiguchi:
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery. IRPS 2022: 1-6 - [c17]Romain Ritzenthaler, Elena Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi:
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits 2022: 306-307 - 2021
- [c16]Subrat Mishra, Pieter Weckx, Odysseas Zografos, Ji-Yung Lin, Alessio Spessot, Francky Catthoor:
Overhead Reduction with Optimal Margining Using A Reliability Aware Design Paradigm. IRPS 2021: 1-7 - 2020
- [c15]Alessio Spessot, Bertrand Parvais, Amita Rawat, Kenichi Miyaguchi, Pieter Weckx, Doyoung Jang, Julien Ryckaert:
Device Scaling roadmap and its implications for Logic and Analog platform. BCICTS 2020: 1-8 - [c14]Adrian Vaisman Chasin, Jacopo Franco, Erik Bury, Romain Ritzenthaler, Eugenio Dentoni Litta, Alessio Spessot, Naoto Horiguchi, Dimitri Linten, Ben Kaczer:
Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation. IRPS 2020: 1-6 - [c13]Subrat Mishra, Pieter Weckx, Ji-Yung Lin, Ben Kaczer, Dimitri Linten, Alessio Spessot, Francky Catthoor:
Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS). IRPS 2020: 1-5
2010 – 2019
- 2019
- [c12]Trong Huynh Bao, Anabela Veloso, Sushil Sakhare, Philippe Matagne, Julien Ryckaert, Manu Perumkunnil, Davide Crotti, Farrukh Yasin, Alessio Spessot, Arnaud Furnémont, Gouri Sankar Kar, Anda Mocuta:
Process, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications. DAC 2019: 13 - [c11]Barry J. O'Sullivan, Romain Ritzenthaler, Gerhard Rzepa, Z. Wu, E. Dentoni Litta, O. Richard, T. Conard, V. Machkaoutsan, Pierre Fazan, C. Kim, Jacopo Franco, Ben Kaczer, Tibor Grasser, Alessio Spessot, Dimitri Linten, N. Horiguchi:
Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices. IRPS 2019: 1-8 - 2017
- [c10]Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene:
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC 2017: 256-259 - [c9]Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene:
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT 2017: 1-4 - [c8]Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Alessio Spessot, Diederik Verkest, Anda Mocuta:
SRAM designs for 5nm node and beyond: Opportunities and challenges. ICICDT 2017: 1-4 - 2015
- [c7]Moonju Cho, Alessio Spessot, Ben Kaczer, Marc Aoulaiche, Romain Ritzenthaler, Tom Schram, Pierre Fazan, Naoto Horiguchi, Dimitri Linten:
Off-state stress degradation mechanism on advanced p-MOSFETs. ICICDT 2015: 1-4 - [c6]Romain Ritzenthaler, Tom Schram, M. J. Cho, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Christian Caillat, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son:
I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration. ICICDT 2015: 1-4 - [c5]Romain Ritzenthaler, Tom Schram, Geert Eneman, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son:
Assessment of SiGe quantum well transistors for DRAM peripheral applications. ICICDT 2015: 1-4 - [c4]Alessio Spessot, Romain Ritzenthaler, Tom Schram, Marc Aoulaiche, Moonju Cho, Maria Toledano-Luque, Naoto Horiguchi, Pierre Fazan:
Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs. ICICDT 2015: 1-4 - 2014
- [c3]Alessio Spessot, Marc Aoulaiche, Moonju Cho, Jacopo Franco, Tom Schram, Romain Ritzenthaler, Ben Kaczer:
Impact of Off State Stress on advanced high-K metal gate NMOSFETs. ESSDERC 2014: 365-368 - 2013
- [c2]Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, Hyuokju Na, Y. Son, K. B. Noh:
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC 2013: 190-193 - 2012
- [c1]Romain Ritzenthaler, Tom Schram, Erik Bury, Jérôme Mitard, L.-Å. Ragnarsson, Guido Groeseneken, N. Horiguchi, Aaron Thean, Alessio Spessot, Christian Caillat, V. Srividya, Pierre Fazan:
Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks. ESSDERC 2012: 242-245
Coauthor Index
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