- Shao-Yun Fang, Szu-Yu Chen, Yao-Wen Chang:
Native-Conflict and Stitch-Aware Wire Perturbation for Double Patterning Technology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 703-716 (2012) - Hongxia Fang, Krishnendu Chakrabarty, Zhiyuan Wang, Xinli Gu:
Reproduction and Detection of Board-Level Functional Failure. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 630-643 (2012) - Hongxia Fang, Krishnendu Chakrabarty, Zhiyuan Wang, Xinli Gu:
Diagnosis of Board-Level Functional Failures Under Uncertainty Using Dempster-Shafer Theory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1586-1599 (2012) - Dogan Fennibay, Arda Yurdakul, Alper Sen:
A Heterogeneous Simulation and Modeling Framework for Automation Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1642-1655 (2012) - Hubert Filiol, Ian O'Connor, Dominique Morche:
Analog IC Variability Bound Estimation Using the Cornish-Fisher Expansion. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1457-1461 (2012) - Eric A. Foreman, Peter A. Habitz, Ming-C. Cheng, Chandu Visweswariah:
A Novel Method for Reducing Metal Variation With Statistical Static Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1293-1297 (2012) - Mingzhi Gao, Zuochang Ye, Yan Wang, Zhiping Yu:
Efficient Full-Chip Statistical Leakage Analysis Based on Fast Matrix Vector Product. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(3): 356-369 (2012) - Rani S. Ghaida, Puneet Gupta:
DRE: A Framework for Early Co-Evaluation of Design Rules, Technology Choices, and Layout Methodologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1379-1392 (2012) - Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei:
Estimation of dc Performance of a Lateral Power MOSFET Using Distributed Cell Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1452-1456 (2012) - Jens Gladigau, Christian Haubelt, Jürgen Teich:
Model-Based Virtual Prototype Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1572-1585 (2012) - Marcel Gort, Jason Helge Anderson:
Accelerating FPGA Routing Through Parallelization and Engineering Enhancements Special Section on PAR-CAD 2010. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(1): 61-74 (2012) - Ibrahim N. Hajj:
Extended Nodal Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(1): 89-100 (2012) - Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
A New Method for March Test Algorithm Generation and Its Application for Fault Detection in RAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(6): 941-949 (2012) - Khaled R. Heloue, Sari Onaissi, Farid N. Najm:
Efficient Block-Based Parameterized Timing Analysis Covering All Potentially Critical Paths. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 472-484 (2012) - Carles Hernández, Antoni Roca, Federico Silla, José Flich, José Duato:
On the Impact of Within-Die Process Variation in GALS-Based NoC Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(2): 294-307 (2012) - Kuan-Hsien Ho, Jie-Hong Roland Jiang, Yao-Wen Chang:
TRECO: Dynamic Technology Remapping for Timing Engineering Change Orders. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1723-1733 (2012) - Hao-Chiao Hong:
A Static Linear Behavior Analog Fault Model for Switched-Capacitor Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 597-609 (2012) - Yi-Ling Hsieh, Tsung-Yi Ho, Krishnendu Chakrabarty:
A Reagent-Saving Mixing Algorithm for Preparing Multiple-Target Biochemical Samples Using Digital Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1656-1669 (2012) - Meng-Kai Hsu, Yao-Wen Chang:
Unified Analytical Global Placement for Large-Scale Mixed-Size Circuit Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1366-1378 (2012) - Kai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, Tsung-Yi Ho:
A Hierarchy-Based Distributed Algorithm for Layout Geometry Operations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1546-1557 (2012) - Jiang Hu, Cheng-Kok Koh:
Guest Editorial Special Section on the 2011 International Symposium on Physical Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(2): 165-166 (2012) - Yu-Jen Huang, Jin-Fu Li:
Built-In Self-Repair Scheme for the TSVs in 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1600-1613 (2012) - Walid Ibrahim, Valeriu Beiu, Azam Beg:
GREDA: A Fast and More Accurate Gate Reliability EDA Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 509-521 (2012) - Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer:
EDT Bandwidth Management in SoC Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(12): 1894-1907 (2012) - Yao-Lin Jiang, Hai-Bao Chen:
Application of General Orthogonal Polynomials to Fast Simulation of Nonlinear Descriptor Systems Through Piecewise-Linear Approximation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 804-808 (2012) - Iris Hui-Ru Jiang, Chih-Long Chang, Yu-Ming Yang:
INTEGRA: Fast Multibit Flip-Flop Clustering for Clock Power Saving. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(2): 192-204 (2012) - Xin Jin, Satoshi Goto:
Hilbert Transform-Based Workload Prediction and Dynamic Frequency Scaling for Power-Efficient Video Encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 649-661 (2012) - Jongyoon Jung, Taewhan Kim:
Variation-Aware False Path Analysis Based on Statistical Dynamic Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1684-1697 (2012) - Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim:
TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3-D IC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1194-1207 (2012) - Abde Ali Kagalwalla, Puneet Gupta, Christopher J. Progler, Steve McDonald:
Design-Aware Mask Inspection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 690-702 (2012)