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ORCIDJohn P. Keane
Person information
- affiliation: Keysight Technologies, Santa Clara, CA, USA
- affiliation (former): University of California, Davis, CA, USA
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Journal Articles
- 2020
[j7]David T. Blaauw
, Hoi Lee, John P. Keane, Jaehyouk Choi, Sudhakar Pamarti:
Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 55(12): 3127-3130 (2020)- 2015
- [j6]Dong Wang, John P. Keane, Paul J. Hurst, Stephen H. Lewis:
An Integrator-Based Pipelined ADC With Digital Calibration. IEEE Trans. Circuits Syst. II Express Briefs 62-II(9): 831-835 (2015) - 2006
- [j5]John P. Keane, Paul J. Hurst, Stephen H. Lewis:
Digital background calibration for memory effects in pipelined analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(3): 511-525 (2006) - 2005
- [j4]John P. Keane, Paul J. Hurst, Stephen H. Lewis:
Background interstage gain calibration technique for pipelined ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(1): 32-43 (2005) - 2004
- [j3]Paul J. Hurst, Stephen H. Lewis, John P. Keane, Farbod Aram, Kenneth C. Dyer:
Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(2): 275-285 (2004) - 2003
- [j2]John P. Keane, Michael Q. Le, Paul J. Hurst:
Analog timing recovery for a noise-predictive decision-feedback equalizer. IEEE J. Solid State Circuits 38(2): 338-342 (2003) - 2002
- [j1]Michael Q. Le, Paul J. Hurst, John P. Keane:
An adaptive analog noise-predictive decision-feedback equalizer. IEEE J. Solid State Circuits 37(2): 105-113 (2002)
Conference and Workshop Papers
- 2017
- [c3]John P. Keane, Nathaniel J. Guilar, Dusan Stepanovic, Bernd Wuppermann, Charles Wu, Cheongyuen W. Tsang, Robert Neff, Ken Nishimura:
16.5 An 8GS/s time-interleaved SAR ADC with unresolved decision detection achieving -58dBFS noise and 4GHz bandwidth in 28nm CMOS. ISSCC 2017: 284-285 - 2013
- [c2]Brian Setterberg, Ken Poulton, Sourja Ray, Dan J. Huber, Valentin Abramzon, Guenter Steinbach, John P. Keane, Bernd Wuppermann, Mathew Clayson, Matthew Martin, Rizwan Pasha, Edda Peeters, Annemie Jacobs, Filip Demarsin, Adnan Al-Adnani, Peter Brandt:
A 14b 2.5GS/s 8-way-interleaved pipelined ADC with background calibration and digital dynamic linearity correction. ISSCC 2013: 466-467 - 2005
- [c1]Dong Wang, John P. Keane, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis:
Convergence analysis of a background interstage gain calibration technique for pipelined ADCs. ISCAS (4) 2005: 4058-4061
Coauthor Index
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