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Steve S. Chung
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2020 – today
- 2023
- [c9]M. Y. Li, J. P. Lee, C. H. Liu, J. C. Guo, Steve S. Chung:
A World First QLC RRAM: Highly Reliable Resistive-Gate Flash with Record 108 Endurance and Excellent Retention. IRPS 2023: 1-7 - [c8]Tiancheng Gong, Lihua Xu, Wei Wei, Pengfei Jiang, Peng Yuan, Bowen Nie, Yuanquan Huang, Yuan Wang, Yang Yang, Jianfeng Gao, Junfeng Li, Jun Luo, Lingfei Wang, Jianguo Yang, Qing Luo, Ling Li, Steve S. Chung, Ming Liu:
First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c7]E. R. Hsieh, J. K. Chang, T. Y. Tang, Y. J. Li, C. W. Liang, M. Y. Lin, S. Y. Huang, C. J. Su, J. C. Guo, Steve S. Chung:
NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 1010 Cycles of Endurance, and Decade Lifetime at 103 °C. VLSI Technology and Circuits 2022: 359-360 - 2021
- [c6]W. Y. Yang, E. R. Hsieh, C. H. Cheng, B. Y. Chen, K. S. Li, Steve S. Chung:
A Reliable Triple-Level Operation of Resistive-Gate Flash Featuring Forming-Free and High Immunity to Sneak Path. IRPS 2021: 1-6 - 2020
- [c5]E. R. Hsieh, H. W. Cheng, Z. H. Huang, C. H. Chuang, S. P. Yang, Steve S. Chung:
A Pulsed RTN Transient Measurement Technique: Demonstration on the Understanding of the Switching in Resistance Memory. IRPS 2020: 1-4
2010 – 2019
- 2019
- [c4]Steve S. Chung:
The Advances of OTP Memory for Embedded Applications in HKMG Generation and Beyond. ASICON 2019: 1-4 - [c3]E. R. Hsieh, C. W. Chang, C. C. Chuang, H. W. Chen, Steve S. Chung:
The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond. VLSI Circuits 2019: 208- - 2018
- [c2]Keji Zhou
, Xiaoyong Xue, Jianguo Yang, Xiaoxin Xu, Hangbing Lv, Mingyu Wang, Ming-e Jing, Wenjun Liu, Xiaoyang Zeng, Steve S. Chung, Jing Li, Ming Liu:
Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F2 and K-means Clustering for Power Reduction. A-SSCC 2018: 135-138 - 2017
- [j1]Steve S. Chung, Xu-Feng Niu:
Financial volatility estimation using functional gradient descent algorithm. Model. Assist. Stat. Appl. 12(4): 305-319 (2017)
1990 – 1999
- 1999
- [c1]Jack L. Chan, Steve S. Chung:
Universal Switched-Current Integrator Blocks for SI Filter Design. ASP-DAC 1999: 261-264
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