default search action
Steve S. Chung
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [c10]T. C. Kao, M. J. Huang, Y. R. Liu, Y. K. Wang, J. C. Guo, Steve S. Chung:
An Ultra-Low Voltage Auger-Recombination Enhanced Hot Hole Injection Scheme in Implementing a 3 Bits per Cell e-DRAM CIM Macro for Inference Accelerator. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c9]M. Y. Li, J. P. Lee, C. H. Liu, J. C. Guo, Steve S. Chung:
A World First QLC RRAM: Highly Reliable Resistive-Gate Flash with Record 108 Endurance and Excellent Retention. IRPS 2023: 1-7 - [c8]Tiancheng Gong, Lihua Xu, Wei Wei, Pengfei Jiang, Peng Yuan, Bowen Nie, Yuanquan Huang, Yuan Wang, Yang Yang, Jianfeng Gao, Junfeng Li, Jun Luo, Lingfei Wang, Jianguo Yang, Qing Luo, Ling Li, Steve S. Chung, Ming Liu:
First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c7]E. R. Hsieh, J. K. Chang, T. Y. Tang, Y. J. Li, C. W. Liang, M. Y. Lin, S. Y. Huang, C. J. Su, J. C. Guo, Steve S. Chung:
NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 1010 Cycles of Endurance, and Decade Lifetime at 103 °C. VLSI Technology and Circuits 2022: 359-360 - 2021
- [c6]W. Y. Yang, E. R. Hsieh, C. H. Cheng, B. Y. Chen, K. S. Li, Steve S. Chung:
A Reliable Triple-Level Operation of Resistive-Gate Flash Featuring Forming-Free and High Immunity to Sneak Path. IRPS 2021: 1-6 - 2020
- [c5]E. R. Hsieh, H. W. Cheng, Z. H. Huang, C. H. Chuang, S. P. Yang, Steve S. Chung:
A Pulsed RTN Transient Measurement Technique: Demonstration on the Understanding of the Switching in Resistance Memory. IRPS 2020: 1-4
2010 – 2019
- 2019
- [c4]Steve S. Chung:
The Advances of OTP Memory for Embedded Applications in HKMG Generation and Beyond. ASICON 2019: 1-4 - [c3]E. R. Hsieh, C. W. Chang, C. C. Chuang, H. W. Chen, Steve S. Chung:
The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond. VLSI Circuits 2019: 208- - 2018
- [c2]Keji Zhou, Xiaoyong Xue, Jianguo Yang, Xiaoxin Xu, Hangbing Lv, Mingyu Wang, Ming-e Jing, Wenjun Liu, Xiaoyang Zeng, Steve S. Chung, Jing Li, Ming Liu:
Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F2 and K-means Clustering for Power Reduction. A-SSCC 2018: 135-138 - 2017
- [j1]Steve S. Chung, Xu-Feng Niu:
Financial volatility estimation using functional gradient descent algorithm. Model. Assist. Stat. Appl. 12(4): 305-319 (2017)
1990 – 1999
- 1999
- [c1]Jack L. Chan, Steve S. Chung:
Universal Switched-Current Integrator Blocks for SI Filter Design. ASP-DAC 1999: 261-264
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-18 20:28 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint