"The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for ..."

E. R. Hsieh et al. (2019)

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DOI: 10.23919/VLSIC.2019.8778094

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

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E. R. Hsieh, C. W. Chang, C. C. Chuang, H. W. Chen, Steve S. Chung:
The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond. VLSI Circuits 2019: 208-

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