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Heechai Kang
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2020 – today
- 2020
- [c2]Venkata Suresh Rayudu, Heechai Kang, Ranjit Gharpurey:
An N-Path Filter with Multiphase PWM Clocks for Harmonic Response Suppression. LASCAS 2020: 1-4
2010 – 2019
- 2018
- [j4]Heechai Kang, Wei-Gi Ho, Vineet Kumar Singh, Ranjit Gharpurey:
A Wideband Receiver Employing PWM-Based Harmonic Rejection Downconversion. IEEE J. Solid State Circuits 53(5): 1398-1410 (2018) - 2015
- [j3]Jung-Hyun Park, Heechai Kang, Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 413-421 (2015) - [j2]Heechai Kang, Jisu Kim, Hanwool Jeong, Younghwi Yang, Seong-Ook Jung:
Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 752-765 (2015) - 2012
- [j1]Heechai Kang, Kyungho Ryu, Dong-Hoon Jung, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10): 2186-2196 (2012) - 2010
- [c1]Heechai Kang, Kyungho Ryu, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process variation tolerant all-digital multiphase DLL for DDR3 interface. CICC 2010: 1-4
Coauthor Index
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