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ORCIDQiang Zhao 0007
Person information
- affiliation: Anhui University, School of Integrated Circuits, Hefei, China
Other persons with the same name
- Qiang Zhao — disambiguation page
- Qiang Zhao 0001 — LitePoint Corporation, Sunnyvale, CA, USA (and 1 more)
- Qiang Zhao 0002
![[0000-0003-2004-1769]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-2004-1769")
— Northeastern University at Qinhuangdao, College of Computer and Communication Engineering, China - Qiang Zhao 0003 — Northeast Forestry University, Traffic College, Harbin, China (and 1 more)
- Qiang Zhao 0004 — North China Electric Power University, School of Nuclear Science and Engineering, Beijing, China (and 1 more)
- Qiang Zhao 0005 — Chinese Academy of Sciences, Institute of Computing Technology, Key Laboratory of Intelligent Information Processing, Beijing, China (and 1 more)
- Qiang Zhao 0006 — China University of Petroleum (East China), CNPC Key Laboratory of Geophysical Prospecting, Qingdao, China
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Journal Articles
- 2024
[j25]Yue Zhao, Yunlong Liu, Jian Zheng, Zhongzhen Tong, Xin Wang, Runru Yu, Xiulong Wu, Yongliang Zhou, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin:
Configurable in-memory computing architecture based on dual-port SRAM. Microelectron. J. 147: 106163 (2024)- [j24]Zhiting Lin, Changxin Yue, Ke Li, Qiushi Feng, Siyan Li, Yue Zhao, Yuanyang Wang, Jiaqi Chen, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Chenghu Dai, Licai Hao, Xiulong Wu:
Cross-coupled 4T2R multi-logic in-memory computing circuit design. Microelectron. J. 147: 106179 (2024) - [j23]Li Liu, Dele Tai, Bin Qiang, Lijun Guan, Chunyu Peng, Chenghu Dai, Licai Hao, Wenjuan Lu, Zhiting Lin, Qiang Zhao, Xiulong Wu:
Flip Point Offset-Compensation Sense Amplifier With Sensing-Margin-Enhancement for Dynamic Random-Access Memory. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 1759-1763 (2024) - [j22]Licai Hao, Xinyi Zhang, Chenghu Dai, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Yongliang Zhou, Zhiting Lin, Xiulong Wu:
Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch Based on Polarity Design and Source-Isolation Technologies. IEEE Trans. Very Large Scale Integr. Syst. 32(4): 597-608 (2024) - [j21]Licai Hao, Yaling Wang, Yunlong Liu, Shiyu Zhao, Xinyi Zhang, Yang Li, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Yongliang Zhou, Chenghu Dai, Zhiting Lin, Xiulong Wu:
Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design. IEEE Trans. Very Large Scale Integr. Syst. 32(5): 883-896 (2024) - 2023
- [j20]Licai Hao, Bin Qiang, Chenghu Dai, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Li Liu, Qiang Zhao, Xiulong Wu, Fei Sun:
Radiation-hardened 14T SRAM cell by polar design for space applications. IEICE Electron. Express 20(13): 20230083 (2023) - [j19]Xiuying Wang, Qiang Zhao, Shoubiao Tan:
Four-branch Siamese network based on sketch-specific data augmentation for sketch recognition. IET Image Process. 17(3): 932-943 (2023) - [j18]Qiang Zhao, Hanwen Dong, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Junning Chen, Xiulong Wu:
Write-enhanced and radiation-hardened SRAM for multi-node upset tolerance in space-radiation environments. Int. J. Circuit Theory Appl. 51(1): 398-409 (2023) - [j17]Zhiting Lin, Zhongzhen Tong, Fangming Wang, Jin Zhang, Yue Zhao, Peng Sun, Tian Xu, Cheng Zhang, Xingwei Li, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Junning Chen:
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. IEEE J. Solid State Circuits 58(5): 1472-1486 (2023) - [j16]Licai Hao, Li Liu, Qi Shi, Bin Qiang, Zhengya Li, Nianlong Liu, Chenghu Dai, Qiang Zhao, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Xiulong Wu:
Design of radiation-hardened memory cell by polar design for space applications. Microelectron. J. 132: 105691 (2023) - [j15]Pengfei Li, Xiuying Wang, Yin Zhang, Haoyu Wang, Jianjie Lu, Qiang Zhao, Licai Hao, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Xiulong Wu:
Novel radiation-hardened-by-design (RHBD) 14T memory cell for aerospace applications in 65 nm CMOS technology. Microelectron. J. 141: 105954 (2023) - [j14]Zhiting Lin, Min Chen, Peng Sun, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng:
High Restore Yield NVSRAM Structures With Dual Complementary RRAM Devices for High-Speed Applications. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 522-531 (2023) - [j13]Zhiting Lin, Shaoying Zhang, Qian Jin, Jianping Xia, Yunwei Liu, Kefeng Yu, Jian Zheng, Xiaoming Xu, Xing Fan, Ke Li, Zhongzhen Tong, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao:
A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store. IEEE Trans. Very Large Scale Integr. Syst. 31(6): 776-788 (2023) - 2022
- [j12]Qiang Zhao, Hanwen Dong, Licai Hao, Xiuying Wang, Chunyu Peng, Xiulong Wu:
Novel radiation-hardened latch design for space-radiation environments. IEICE Electron. Express 19(13): 20220170 (2022) - [j11]Yue Zhao, Jinkai Wang, Zhongzhen Tong, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin:
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset. Microelectron. J. 128: 105578 (2022) - [j10]Jin Zhang, Zhiting Lin, Xiulong Wu, Zhongzhen Tong, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Hongbiao Wu, Junning Chen:
In-Memory Multibit Multiplication Based on Bitline Shifting. IEEE Trans. Circuits Syst. II Express Briefs 69(2): 354-358 (2022) - [j9]Yue Zhao, Zhiting Lin, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Zhongzhen Tong, Junning Chen:
Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing. IEEE Trans. Very Large Scale Integr. Syst. 30(5): 566-578 (2022) - 2021
- [j8]Zhiting Lin, Honglan Zhan, Zhongwei Chen, Chunyu Peng, Xiulong Wu, Wenjuan Lu, Qiang Zhao, Xuan Li, Junning Chen:
Cascade Current Mirror to Improve Linearity and Consistency in SRAM In-Memory Computing. IEEE J. Solid State Circuits 56(8): 2550-2562 (2021) - [j7]Zhiting Lin, Luanyun Li, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao:
Half-Select Disturb-Free 10T Tunnel FET SRAM Cell With Improved Noise Margin and Low Power Consumption. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2628-2632 (2021) - 2020
- [j6]Qiang Zhao, Chunyu Peng, Junning Chen, Zhiting Lin, Xiulong Wu:
Novel Write-Enhanced and Highly Reliable RHPD-12T SRAM Cells for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 848-852 (2020) - 2019
- [j5]Changyong Liu, Zhiting Lin, Xiulong Wu, Chunyu Peng, Qiang Zhao, Xuan Li, Junning Chen, Xuan Zeng, Xiangdong Hu:
An inverter chain with parallel output nodes for eliminating single-event transient pulse. IEICE Electron. Express 16(4): 20181118 (2019) - [j4]Changyong Liu, Nianlong Liu, Zhiting Lin, Xiulong Wu, Chunyu Peng, Qiang Zhao, Xuan Li, Junning Chen, Xuan Zeng, Xiangdong Hu:
A single event upset tolerant latch with parallel nodes. IEICE Electron. Express 16(11): 20190208 (2019) - [j3]Qiang Zhao, Chunyu Peng, Changyong Liu, Xiulong Wu:
Physical mechanism study of N-well doping effects on the single-event transient characteristic of PMOS. IEICE Electron. Express 16(17): 20190407 (2019) - [j2]Chunyu Peng, Jiati Huang, Changyong Liu, Qiang Zhao, Songsong Xiao, Xiulong Wu, Zhiting Lin, Junning Chen, Xuan Zeng:
Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 407-415 (2019) - 2018
- [j1]Changyong Liu, Chunyu Peng, Zhiting Lin, Xiulong Wu, Ziyang Chen, Qiang Zhao, Xuan Li, Junning Chen, Xuan Zeng, Xiangdong Hu:
A dual-output hardening design of inverter chain for P-hit single-event transient pulse elimination. IEICE Electron. Express 15(15): 20180604 (2018)
Coauthor Index
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