- Nuno Guerreiro, Marcelino B. Santos
:
Mixed-Signal Fault Equivalence: Search and Evaluation. Asian Test Symposium 2011: 377-382 - Puneet Gupta
, Rajesh K. Gupta:
Underdesigned and Opportunistic Computing. Asian Test Symposium 2011: 498-499 - Atul Gupta, Ajay Kumar, Manas Chhabra:
Characterizing Pattern Dependent Delay Effects in DDR Memory Interfaces. Asian Test Symposium 2011: 425-431 - Said Hamdioui, Venkataraman Krishnaswami, Ijeoma Sandra Irobi, Zaid Al-Ars:
A New Test Paradigm for Semiconductor Memories in the Nano-Era. Asian Test Symposium 2011: 347-352 - Said Hamdioui, Mottaqiallah Taouil:
Yield Improvement and Test Cost Optimization for 3D Stacked ICs. Asian Test Symposium 2011: 480-485 - Nor Zaidi Haron, Said Hamdioui:
On Defect Oriented Testing for Hybrid CMOS/Memristor Memory. Asian Test Symposium 2011: 353-358 - Yoshinobu Higami, Hiroshi Furutani, Takao Sakai, Shuichi Kameyama, Hiroshi Takahashi:
Test Pattern Selection for Defect-Aware Test. Asian Test Symposium 2011: 102-107 - Yoshinobu Higami, Hiroshi Takahashi, Shin-ya Kobayashi, Kewal K. Saluja:
On Detecting Transition Faults in the Presence of Clock Delay Faults. Asian Test Symposium 2011: 1-6 - Keheng Huang, Yu Hu, Xiaowei Li, Gengxin Hua, Hongjin Liu, Bo Liu:
Exploiting Free LUT Entries to Mitigate Soft Errors in SRAM-based FPGAs. Asian Test Symposium 2011: 438-443 - Hideyuki Ichihara, Yuka Iwamoto, Yuki Yoshikawa, Tomoo Inoue:
Test Compression Based on Lossy Image Encoding. Asian Test Symposium 2011: 273-278 - Sandra Irobi, Zaid Al-Ars, Said Hamdioui, Claude Thibeault:
Testing for Parasitic Memory Effect in SRAMs. Asian Test Symposium 2011: 407-412 - Umair Ishaq, Jihun Jung, Jaehoon Song, Sungju Park:
Efficient Use of Unused Spare Columns to Improve Memory Error Correcting Rate. Asian Test Symposium 2011: 335-340 - Eun Jung Jang, Jaeyong Chung
, Anne E. Gattiker, Sani R. Nassif, Jacob A. Abraham:
Post-Silicon Timing Validation Method Using Path Delay Measurements. Asian Test Symposium 2011: 232-237 - Fatemeh Javaheri, Majid Namaki-Shoushtari, Parastoo Kamranfar, Zainalabedin Navabi:
Mapping Transaction Level Faults to Stuck-At Faults in Communication Hardware. Asian Test Symposium 2011: 114-119 - Naghmeh Karimi, Zhiqiu Kong, Krishnendu Chakrabarty
, Pallav Gupta, Srinivas Patil:
Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip. Asian Test Symposium 2011: 7-14 - Xrysovalantis Kavousianos, Krishnendu Chakrabarty
, Arvind Jain, Rubin A. Parekhji:
Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands. Asian Test Symposium 2011: 33-39 - Behnam Khodabandeloo, Seyyed Alireza Hoseini, Sajjad Taheri, Mohammad Hashem Haghbayan, Mahmood Reza Babaei, Zainalabedin Navabi:
Online Test Macro Scheduling and Assignment in MPSoC Design. Asian Test Symposium 2011: 148-153 - Shray Khullar, Swapnil Bahl:
Power Aware Shift and Capture ATPG Methodology for Low Power Designs. Asian Test Symposium 2011: 500-505 - Hyunjin Kim, Jacob A. Abraham:
On-Chip Programmable Dual-Capture for Double Data Rate Interface Timing Test. Asian Test Symposium 2011: 15-20 - Matthias Kirmse, Uwe Petersohn, Elief Paffrath:
Optimized Test Error Detection by Probabilistic Retest Recommendation Models. Asian Test Symposium 2011: 317-322 - Michael A. Kochte, Sandip Kundu, Kohei Miyase, Xiaoqing Wen, Hans-Joachim Wunderlich:
Efficient BDD-based Fault Simulation in Presence of Unknown Values. Asian Test Symposium 2011: 383-388 - Anvesh Komuravelli, Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta:
Backward Reasoning with Formal Properties: A Methodology for Bug Isolation on Simulation Traces. Asian Test Symposium 2011: 238-243 - Uros Legat, Anton Biasizzo, Franc Novak:
Soft Error Recovery Technique for Multiprocessor SOPC. Asian Test Symposium 2011: 175-180 - Xijiang Lin, Elham K. Moghaddam, Nilanjan Mukherjee, Benoit Nadeau-Dostie, Janusz Rajski, Jerzy Tyszer:
Power Aware Embedded Test. Asian Test Symposium 2011: 511-516 - Kohei Miyase, Y. Uchinodan, Kazunari Enokimoto, Yuta Yamato, Xiaoqing Wen, Seiji Kajihara, Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Arnaud Virazel:
Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling. Asian Test Symposium 2011: 90-95 - Elham K. Moghaddam, Janusz Rajski, Sudhakar M. Reddy, Jakub Janicki:
Low Test Data Volume Low Power At-Speed Delay Tests Using Clock-Gating. Asian Test Symposium 2011: 267-272 - Grzegorz Mrugalski, Artur Pogiel, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Pawel Urbanek:
Fault Diagnosis in Memory BIST Environment with Non-march Tests. Asian Test Symposium 2011: 419-424 - Debdeep Mukhopadhyay, Rajat Subhra Chakraborty:
Testability of Cryptographic Hardware and Detection of Hardware Trojans. Asian Test Symposium 2011: 517-524 - Abdullah Mumtaz, Michael E. Imhof, Stefan Holst, Hans-Joachim Wunderlich:
Embedded Test for Highly Accurate Defect Localization. Asian Test Symposium 2011: 213-218 - Jayaram Natarajan, Joshua W. Wells, Abhijit Chatterjee, Adit D. Singh:
Distributed Comparison Test Driven Multiprocessor Speed-Tuning: Targeting Performance Gains under Extreme Process Variations. Asian Test Symposium 2011: 154-160