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Publication search results
found 29 matches
- 1984
- Miron Abramovici, Prem R. Menon, David T. Miller:
Critical Path Tracing: An Alternative to Fault Simulation. IEEE Des. Test 1(1): 83-93 (1984) - Robert E. Anderson:
Linking Design&Test. IEEE Des. Test 1(2): 27-31 (1984) - Prithviraj Banerjee, Jacob A. Abraham:
Characterization and Testing of Physical Failures in MOS Logic Circuits. IEEE Des. Test 1(3): 76-86 (1984) - Mark R. Barber:
Fundamental Timing Problems in Testing MOS VLSI on Modern ATE. IEEE Des. Test 1(3): 90-97 (1984) - Zeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo:
Fast Pass-Transistor Simulation for Custom MOS Circuits. IEEE Des. Test 1(1): 71-81 (1984) - Michael J. Bending:
Hitest: A Knowledge-Based Test Generation System. IEEE Des. Test 1(2): 83-92 (1984) - William S. Blackley, Mervyn A. Jack, James R. Jordan:
A Digital Polarity Correlator with Built-in Self Test and Self Repair. IEEE Des. Test 1(2): 42-49 (1984) - Tom Blank:
A Survey of Hardware Accelerators Used in Computer-Aided Design. IEEE Des. Test 1(3): 21-39 (1984) - Larry N. Dunn:
IBM'S Engineering Design System Support for VLSI Design and Verification. IEEE Des. Test 1(1): 30-40 (1984) - David Florcik, David Low, Martin Roche:
Prototype Debug using ATE. IEEE Des. Test 1(2): 94-99 (1984) - Francine S. Frome:
Improving color CAD Systems for Users: Some Suggestions from Human Factors Studies. IEEE Des. Test 1(1): 18-27 (1984) - Rudy Garcia:
The Fairchild Sentry 50 Tester: Establishing New ATE Performance Limits. IEEE Des. Test 1(2): 101-109 (1984) - W. R. Heller, C. George Hsi, Wadie F. Mikhaill:
Wirability-designing wiring space for chips and chip packages. IEEE Des. Test 1(3): 43-51 (1984) - Dwight D. Hill:
Icon: A Tool for Design at Schematic, Virtual Grid, and Layout Levels. IEEE Des. Test 1(4): 53-60 (1984) - Nikos Kanopoulos, G. Thomas Mitchell:
Design for Testability and Self-Testing Approaches for Bit-Serial signal Processors. IEEE Des. Test 1(2): 52-59 (1984) - Jin H. Kim, John McDermott, Daniel P. Siewiorek:
Exploiting Domain Knowledge in IC Cell Layout. IEEE Des. Test 1(3): 52-64 (1984) - Thaddeus J. Kowalski, Donald E. Thomas:
The VLSI Design Automation Assistant: An IBM System/370 Design. IEEE Des. Test 1(1): 60-69 (1984) - Robert C. Kroeger:
Testability Emphasis in the General Electric A/VLSI Program. IEEE Des. Test 1(2): 61-65 (1984) - John R. Kuban, William C. Bruce:
Self-Testing the Motorola MC6804P2. IEEE Des. Test 1(2): 33-41 (1984) - Johnny J. LeBlanc:
LOCST: A Built-In Self-Test Technique. IEEE Des. Test 1(4): 45-52 (1984) - Yashwant K. Malaiya, Ramesh Narayanaswamy:
Modeling and Testing for Timing Faults in Synchronous Sequential Circuits. IEEE Des. Test 1(4): 62-74 (1984) - Akira Motohara, Hideo Fujiwara:
Design for Testability for Complete Test Coverage. IEEE Des. Test 1(4): 25-32 (1984) - Hillel Ofek:
Guest Editor's Introduction Design Automation. IEEE Des. Test 1(1): 16-17 (1984) - Alice C. Parker:
Automated Synthesis of Digital systems. IEEE Des. Test 1(4): 75-81 (1984) - Chantal Robach, Philippe Malecha, Gilles Michel:
CATA: A Computer-Aided Test Analysis System. IEEE Des. Test 1(2): 68-79 (1984) - Charles W. Rose, Greg M. Ordy, Paul J. Drongowski:
N.mPc: A Study in University-Industry Technology Transfer. IEEE Des. Test 1(1): 44-56 (1984) - Steve Sapiro:
The electronic workstation-an overview. IEEE Des. Test 1(4): 33-41 (1984) - Richard M. Sedmak, Donald E. Thomas:
Probing the State of the Art. IEEE Des. Test 1(3): 18-19 (1984) - Ronald L. Wadsack:
Design Verification and Testing of the WE 32100 CPUs. IEEE Des. Test 1(3): 66-75 (1984)
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retrieved on 2024-11-13 22:47 CET from data curated by the dblp team
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