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"Modeling and Testing for Timing Faults in Synchronous Sequential Circuits."

Yashwant K. Malaiya, Ramesh Narayanaswamy (1984)

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DOI: 10.1109/MDT.1984.5005692

access: closed

type: Journal Article

metadata version: 2020-11-11

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  - journals/dt/MalaiyaN84
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  - https://dblp.org/rec/journals/dt/MalaiyaN84
Yashwant K. Malaiya, Ramesh Narayanaswamy:
Modeling and Testing for Timing Faults in Synchronous Sequential Circuits. IEEE Des. Test 1(4): 62-74 (1984)

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