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Publication search results
found 55 matches
- 2016
- Salem Abdennadher, Saghir A. Shaikh:
Practices in High-Speed IO testing. ETS 2016: 1-8 - Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene:
Read path degradation analysis in SRAM. ETS 2016: 1-2 - Nasim Pour Aryan, Christian Funke, Jens Bargfrede, Cenk Yilmaz, Doris Schmitt-Landsiedel, Georg Georgakos:
In situ measurement of aging-induced performance degradation in digital circuits. ETS 2016: 1-2 - Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson:
On the diagnostic analysis of IEEE 1687 networks. ETS 2016: 1-2 - Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Addressing transient routing errors in fault-tolerant Networks-on-Chips. ETS 2016: 1-6 - Te-Hui Chen, David C. Keezer:
A 40Gbps economic extension board and FPGA-based testing platform. ETS 2016: 1-2 - Weida Chen, Yongxin Zhu, Xinyi Liu, Xinyang Li, Dongyu Ou:
Combining the histogram method and the ultrafast segmented model identification of linearity errors algorithm for ADC linearity testing. ETS 2016: 1-2 - Jeroen De Coster, Peter De Heyn, Marianna Pantouvaki, Brad Snyder, Hongtao Chen, Erik Jan Marinissen, Philippe Absil, Joris Van Campenhout, Bryan Bolt:
Test-station for flexible semi-automatic wafer-level silicon photonics testing. ETS 2016: 1-6 - Boyang Du, Luca Sterpone, David Merodio Codinachs:
A new EDA flow for the mitigation of SEUs in dynamic reconfigurable FPGAs. ETS 2016: 1-2 - Jean Durupt, Pascal Vivet, Juergen Schloeffel:
IJTAG supported 3D DFT using chiplet-footprints for testing multi-chips active interposer system. ETS 2016: 1-6 - Stephan Eggersglüß, Kohei Miyase, Xiaoqing Wen:
SAT-based post-processing for regional capture power reduction in at-speed scan test generation. ETS 2016: 1-6 - Tasuku Fujibe, Kazuki Shirahata, Takeshi Mizushima, Hidenobu Matsumura, Daisuke Watanabe, Hiroyuki Mineo, Shin Masuda:
An optical/electrical test system for 100Gb/s optical interconnection devices with high volume testing capability. ETS 2016: 1-2 - Paolo Gai, Massimo Violante:
Automotive embedded software architecture in the multi-core age. ETS 2016: 1-8 - Panagiotis Georgiou, Fotios Vartziotis, Xrysovalantis Kavousianos, Krishnendu Chakrabarty:
Two-dimensional time-division multiplexing for 3D-SoCs. ETS 2016: 1-6 - Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragán, Salvador Mir:
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. ETS 2016: 1-6 - Satish Grandhi, Elsa Dupraz, Christian Spagnol, Valentin Savin, Emanuel M. Popovici:
CPE: Codeword Prediction Encoder. ETS 2016: 1-2 - Stavros Hadjitheophanous, Stelios N. Neophytou, Maria K. Michael:
Utilizing shared memory multi-cores to speed-up the ATPG process. ETS 2016: 1-6 - Said Hamdioui, Giorgio Di Natale, Bram Kruseman, Maria K. Michael, Haralampos-G. D. Stratigopoulos:
ETS 2016 foreword. ETS 2016: 1 - Sebastian Huhn, Stephan Eggersglüß, Rolf Drechsler:
VecTHOR: Low-cost compression architecture for IEEE 1149-compliant TAP controllers. ETS 2016: 1-6 - Ahmed Ibrahim, Hans G. Kerkhoff:
Analysis and design of an on-chip retargeting engine for IEEE 1687 networks. ETS 2016: 1-6 - Artur Jutman, Igor Aleksejev, Sergei Devadze:
On coverage of timing related faults at board level. ETS 2016: 1-2 - Josef Kinseher, Moritz Völker, Leonardo Bonet Zordan, Ilia Polian:
Failure mechanisms and test methods for the SRAM TVC write-assist technique. ETS 2016: 1-2 - Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich:
Formal verification of secure reconfigurable scan network infrastructure. ETS 2016: 1-6 - Abhishek Koneru, Krishnendu Chakrabarty:
Analysis of electrostatic coupling in monolithic 3D integrated circuits and its impact on delay testing. ETS 2016: 1-6 - Gildas Léger, Manuel J. Barragán:
Questioning the reliability of Monte Carlo simulation for machine learning test validation. ETS 2016: 1-6 - Xijiang Lin, Sudhakar M. Reddy, Janusz Rajski:
Transistor stuck-on fault detection tests for digital CMOS circuits. ETS 2016: 1-6 - Erik Jan Marinissen, Teresa L. McLaurin, Hailong Jiao:
IEEE Std P1838: DfT standard-under-development for 2.5D-, 3D-, and 5.5D-SICs. ETS 2016: 1-10 - Erik Jan Marinissen, Yervant Zorian, Mario Konijnenburg, Chih-Tsun Huang, Ping-Hsuan Hsieh, Peter Cockburn, Jeroen Delvaux, Vladimir Rozic, Bohan Yang, Dave Singelée, Ingrid Verbauwhede, Cedric Mayor, Robert Van Rijsinge, Cocoy Reyes:
IoT: Source of test challenges. ETS 2016: 1-10 - Peter C. Maxwell, Friedrich Hapke, Huaxing Tang:
Cell-aware diagnosis: Defective inmates exposed in their cells. ETS 2016: 1-6 - Gian Mayuga, Yuta Yamato, Tomokazu Yoneda, Yasuo Sato, Michiko Inoue:
Reliability enhancement of embedded memory with combination of aging-aware adaptive in-field self-repair and ECC. ETS 2016: 1-2
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