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2010 – 2019
- 2018
[j14]Bipul C. Paul, Ajey P. Jacob
, William Taylor, Randy W. Mann, Joseph Versaggi, Edward J. Nowak, Lars W. Liebmann:
A Retrospective View on the Technology Evolution to Support Low Power Mobile Application. J. Low Power Electron. 14(3): 374-392 (2018)- [c6]Ali Razavieh, Y. Deng, Peter Zeitzoff, M. R. Na, J. Frougier, Gauri Karve, D. E. Brown, T. Yamashita, Edward J. Nowak:
Effective Drive Current in Scaled FinFET and NSFET CMOS Inverters. DRC 2018: 1-2
2000 – 2009
- 2008
- [c5]Jung-Suk Goo, Richard Q. Williams, Glenn O. Workman, Qiang Chen, Sungjae Lee, Edward J. Nowak:
Compact modeling and simulation of PD-SOI MOSFETs: Current status and challenges. CICC 2008: 265-272 - 2007
- [c4]Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang:
A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. VLSI Design 2007: 665-672 - 2006
- [j13]Wilfried Haensch, Edward J. Nowak, Robert H. Dennard, Paul M. Solomon, Andres Bryant, Omer H. Dokumaci, Arvind Kumar, Xinlin Wang, Jeffrey B. Johnson, Massimo V. Fischetti:
Silicon CMOS devices beyond scaling. IBM J. Res. Dev. 50(4-5): 339-362 (2006) - [j12]Kerry Bernstein, David J. Frank, Anne E. Gattiker, Wilfried Haensch, Brian L. Ji, Sani R. Nassif, Edward J. Nowak, Dale J. Pearson, Norman J. Rohrer:
High-performance CMOS variability in the 65-nm regime and beyond. IBM J. Res. Dev. 50(4-5): 433-450 (2006) - [j11]Scott Hanson, Bo Zhai, Kerry Bernstein, David T. Blaauw, Andres Bryant, Leland Chang, Koushik K. Das, Wilfried Haensch, Edward J. Nowak, Dennis Sylvester:
Ultralow-voltage, minimum-energy CMOS. IBM J. Res. Dev. 50(4-5): 469-490 (2006) - 2005
- [j10]Alvin J. Joseph, David L. Harame, Basanth Jagannathan, Douglas D. Coolbaugh, David C. Ahlgren, John Magerlein, Louis D. Lanzerotti, Natalie B. Feilchenfeld, Stephen A. St. Onge, James S. Dunn, Edward J. Nowak:
Status and Direction of Communication Technologies - SiGe BiCMOS and RFCMOS. Proc. IEEE 93(9): 1539-1558 (2005) - 2003
- [j9]Ernest Y. Wu, Jordi Suñé, Wing L. Lai, Alex Vayshenker, Edward J. Nowak, David L. Harmon:
Critical reliability challenges in scaling SiO2-based dielectric to its limit. Microelectron. Reliab. 43(8): 1175-1184 (2003) - [c3]Edward J. Nowak, Thomas Ludwig, Ingo Aller, Jakub Kedzierski, M. Leong, BethAnn Rainey, Matthew J. Breitwisch, V. Gemhoefer, Joachim Keinert, David M. Fried:
Scaling beyond the 65 nm node with FinFET-DGCMOS. CICC 2003: 339-342 - 2002
- [j8]Edward J. Nowak:
Maintaining the benefits of CMOS scaling when scaling bogs down. IBM J. Res. Dev. 46(2-3): 169-186 (2002) - [j7]Ernest Y. Wu, Edward J. Nowak, Alex Vayshenker, Wing L. Lai, David L. Harmon:
CMOS scaling beyond the 100-nm node with silicon-dioxide-based gate dielectrics. IBM J. Res. Dev. 46(2-3): 287-298 (2002) - [c2]Meikei Leong, H.-S. Philip Wong, Edward J. Nowak, Jakub Kedzierski, Erin C. Jones:
High Performance Double-Gate Device Technology Challenges and Opportunities (invited). ISQED 2002: 492-495 - 2001
- [j6]David J. Frank, Robert H. Dennard, Edward J. Nowak, Paul M. Solomon, Yuan Taur, Hon-Sum Philip Wong:
Device scaling limits of Si MOSFETs and their application dependencies. Proc. IEEE 89(3): 259-288 (2001)
1990 – 1999
- 1996
- [c1]Kerry Bernstein, John E. Bertsch, William F. Clark, John J. Ellis-Monaghan, Larry G. Heller, Edward J. Nowak:
Practical performance/power alternatives within an existing CMOS technology generation. ISLPED 1996: 365-370 - 1995
- [j5]Kerry Bernstein, John E. Bertsch, Lawrence G. Heller, Edward J. Nowak, Francis R. White:
Reduced-voltage power/performance optimization of the 3.6-volt PowerPC 601 Microprocessor. IBM J. Res. Dev. 39(1-2): 33-42 (1995) - [j4]Donald G. Chesebro, James W. Adkisson, Lyman R. Clark, Steven N. Eslinger, Margaret A. Faucher, Steven J. Holmes, Raymond P. Mallette, Edward J. Nowak, Edward W. Sengle, Steven H. Voldman, Thomas W. Weeks:
Overview of gate linewidth control in the manufacture of CMOS logic chips. IBM J. Res. Dev. 39(1-2): 189-200 (1995) - [j3]Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam G. Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman:
A half-micron CMOS logic generation. IBM J. Res. Dev. 39(1-2): 215-228 (1995) - [j2]Yuan Taur, Yuh-Jier Mii, David J. Frank, H.-S. Philip Wong, Douglas A. Buchanan, Shalom J. Wind, Stephen A. Rishton, Watson A. Sai-Halasz, Edward J. Nowak:
CMOS scaling into the 21st century: 0.1 µm and beyond. IBM J. Res. Dev. 39(1-2): 245-260 (1995) - 1994
- [j1]Daniel Foty, Edward J. Nowak:
MOSFET technology for low-voltage/low-power applications. IEEE Micro 14(3): 68-77 (1994)
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