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2020 – today
- 2024
[c3]Sung-Yong Cho, Moon-Chul Choi, Jaehyeok Baek, Donggun An, Sanghoon Kim, Daewoong Lee, Seongyeal Yang, Gil-Young Kang, Juseop Park, Kyungho Lee, Hwan-Chul Jung, Gun-hee Cho, ChanYong Lee, Hye-Ran Kim, Yong-Jae Shin, Hanna Park, Sangyong Lee, Jonghyuk Kim, Bokyeon Won, Jungil Mok, Kijin Kim, Unhak Lim, Hong-Jun Jin, YoungSeok Lee, Young-Tae Kim, Heonjoo Ha, Jinchan Ahn, Wonju Sung, Yoontaek Jang, Hoyoung Song, Hyodong Ban, TaeHoon Park, Tae-Young Oh, Changsik Yoo, SangJoon Hwang:
13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ Calibration. ISSCC 2024: 242-244- 2023
- [j2]Daewoong Lee
, Jaehyeok Baek, Hye-Jung Kwon, Daehyun Kwon, Chulhee Cho, Sang-Hoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, Hyoung-Joo Kim, Ho-Seok Seol, Juhwan Kim, Jung-Bum Shin, Gil-Young Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, ChanYong Lee, Seungseob Lee, TaeHoon Park, Chi-Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, Jung-Hwan Choi, Jooyoung Lee:
A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ. IEEE J. Solid State Circuits 58(1): 279-290 (2023) - 2022
- [c2]Daewoong Lee, Hye-Jung Kwon, Daehyun Kwon, Jaehyeok Baek, Chulhee Cho, Sanghoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, Hyoungjoo Kim, Ho-Seok Seol, Juhwan Kim, Junabum Shin, Kil-Youna Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, ChanYong Lee, Seungseob Lee, TaeHoon Park, Chi Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, Jung-Hwan Choi, Jooyoung Lee:
A 16Gb 27Gb/s/pin T-coil based GDDR6 DRAM with Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus. ISSCC 2022: 446-448
2010 – 2019
- 2019
- [j1]Young-Ju Kim, Hye-Jung Kwon, Su-Yeon Doo, Min-Su Ahn, Yong-Hun Kim, Yong Jae Lee, Dong-Seok Kang, Sung-Geun Do, Chang-Yong Lee, Gun-hee Cho, Jae-Koo Park, Jae-Sung Kim, Kyung-Bae Park, Seung-Hoon Oh, Sang-Yong Lee, Ji-Hak Yu, Ki-Hun Yu, Chul-Hee Jeon, Sang-Sun Kim, Hyun-Soo Park, Jeong-Woo Lee, Seung-Hyun Cho, Keon-Woo Park, Yong-Jun Kim, Young-Hun Seo, Chang-Ho Shin, ChanYong Lee, Sam-Young Bang, Youn-Sik Park, Seouk-Kyu Choi, Byung-Cheol Kim, Gong-Heum Han, Seung-Jun Bae, Hyuk-Jun Kwon, Jung-Hwan Choi, Young-Soo Sohn, Kwang-Il Park, Seong-Jin Jang, Gyo-Young Jin:
A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking. IEEE J. Solid State Circuits 54(1): 197-209 (2019) - 2018
- [c1]Young-Ju Kim, Hye-Jung Kwon, Su-Yeon Doo, Yoon-Joo Eom, Young-Sik Kim, Min-Su Ahn, Yong-Hun Kim, Sang-Hoon Jung, Sung-Geun Do, Chang-Yong Lee, Jae-Sung Kim, Dong-Seok Kang, Kyung-Bae Park, Jung-Bum Shin, Jong-Ho Lee, Seung-Hoon Oh, Sang-Yong Lee, Ji-Hak Yu, Ji-Suk Kwon, Ki-Hun Yu, Chul-Hee Jeon, Sang-Sun Kim, Min-Woo Won, Gun-hee Cho, Hyun-Soo Park, Hyung-Kyu Kim, Jeong-Woo Lee, Seung-Hyun Cho, Keon-Woo Park, Jae-Koo Park, Yong Jae Lee, Yong-Jun Kim, Young-Hun Seo, Beob-Rae Cho, Chang-Ho Shin, ChanYong Lee, YoungSeok Lee, Yoon-Gue Song, Sam-Young Bang, Youn-Sik Park, Seouk-Kyu Choi, Byeong-Cheol Kim, Gong-Heum Han, Seung-Jun Bae, Hyuk-Jun Kwon, Jung-Hwan Choi, Young-Soo Sohn, Kwang-Il Park, Seong-Jin Jang:
A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking. ISSCC 2018: 204-206
Coauthor Index
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