"A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK ..."

Daewoong Lee et al. (2023)

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DOI: 10.1109/JSSC.2022.3222203

access: closed

type: Journal Article

metadata version: 2023-01-15

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Daewoong Lee, Jaehyeok Baek, Hye-Jung Kwon, Daehyun Kwon, Chulhee Cho, Sang-Hoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, Hyoung-Joo Kim, Ho-Seok Seol, Juhwan Kim, Jung-Bum Shin, Gil-Young Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, ChanYong Lee, Seungseob Lee, TaeHoon Park, Chi-Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, Jung-Hwan Choi, Jooyoung Lee:
A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ. IEEE J. Solid State Circuits 58(1): 279-290 (2023)

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