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Feng-Tso Chien
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Journal Articles
- 2016
- [j12]Hsien-Chin Chiu
, Ji-Fan Chi, Hsuan-Ling Kao
, Chia-Yi Chu, Kuan-Liang Cho, Feng-Tso Chien:
The ESD protection characteristic and low-frequency noise analysis of GaN Schottky barrier diode with fluorine-based plasma treatment. Microelectron. Reliab. 59: 44-48 (2016) - 2014
- [j11]Hsien-Chin Chiu
, Chia-Hsuan Wu, Ji-Fan Chi, Feng-Tso Chien:
Device characteristics of AlGaN/GaN MIS-HEMTs with high-k HfxZr1-xO2 (x = 0.66, 0.47, 0.15) insulator layer. Microelectron. Reliab. 54(6-7): 1282-1287 (2014) - 2013
- [j10]Hsien-Chin Chiu
, Chao-Wei Lin, Fan-Hsiu Huang, Hsuan-Ling Kao
, Feng-Tso Chien, Hao-Wei Chuang, Kuo-Jen Chang, Yau-Tang Gau:
Low frequency noise in field-plate multigate AlGaN/GaN single-pole-single-throw RF switches on silicon substrate. Microelectron. Reliab. 53(3): 405-408 (2013) - [j9]Hsien-Chin Chiu
, Hsiang-Chun Wang, Chao-Wei Lin, Yi-Cheng Luo, Hsuan-Ling Kao
, Feng-Tso Chien, Ping-Kuo Weng, Yan-Tang Gau, Hao-Wei Chuang:
Low gate interface traps AlGaN/GaN HEMTs using a lattice matched ZrZnO transparent gate design. Microelectron. Reliab. 53(8): 1130-1136 (2013) - [j8]Hsien-Chin Chiu
, Chao-Hung Chen, Hsuan-Ling Kao
, Feng-Tso Chien, Ping-Kuo Weng, Yan-Tang Gau, Hao-Wei Chuang:
Sidewall defects of AlGaN/GaN HEMTs evaluated by low frequency noise analysis. Microelectron. Reliab. 53(12): 1897-1900 (2013) - 2012
- [j7]Chao-Hung Chen, Hsien-Chin Chiu
, Chih-Wei Yang, Jeffrey S. Fu, Feng-Tso Chien:
Novel GaAs enhancement-mode/depletion-mode pHEMTs technology using high-k praseodymium oxide interlayer. Microelectron. Reliab. 52(1): 147-150 (2012) - [j6]Che-Kai Lin, Hsien-Chin Chiu
, Chao-Wei Lin, Hsuan-Ling Kao
, Feng-Tso Chien:
Investigation on the thermal behavior of 0.15 μm gate-length In0.4Al0.6As/In0.4Ga0.6As MHEMT. Microelectron. Reliab. 52(6): 969-973 (2012) - [j5]Chao-Hung Chen, Hsien-Chin Chiu, Feng-Tso Chien, Hao-Wei Chuang, Kuo-Jen Chang, Yau-Tang Gau:
High thermal stability and low hysteresis dispersion AlGaN/GaN MOS-HEMTs with zirconia film design. Microelectron. Reliab. 52(11): 2551-2555 (2012) - 2007
- [j4]Chien-Nan Liao, Feng-Tso Chien, Chi-Ling Wang, Hsien-Chin Chiu, Yi-Jen Chan:
A Novel Power MOSFET Structure with Shallow Junction Dual Well Design. IEICE Trans. Electron. 90-C(5): 937-942 (2007) - 2006
- [j3]Feng-Tso Chien, Chien-Nan Liao, Chi-Ling Wang, Hsien-Chin Chiu
:
High Performance Power MOSFETs by Wing-Cell Structure Design. IEICE Trans. Electron. 89-C(5): 591-595 (2006) - 2005
- [j2]Feng-Tso Chien, Ming-Hung Lai, Shih-Tzung Su, Kou-Way Tu, Ching-Ling Cheng:
High Ruggedness Power MOSFET Design by a Self-Align p+ Process. IEICE Trans. Electron. 88-C(4): 694-698 (2005) - 1999
- [j1]Feng-Tso Chien, Yi-Jen Chan:
Bandwidth enhancement of transimpedance amplifier by a capacitive-peaking design. IEEE J. Solid State Circuits 34(8): 1167-1170 (1999)
Conference and Workshop Papers
- 2010
- [c2]Elone Lee, Feng-Tso Chien, Ching-Hwa Cheng, Jiun-In Guo:
Dynamic voltage domain assignment technique for low power performance manageable cell based design. ASP-DAC 2010: 359-360 - [c1]Chen-I Chung, Shuo-Wen Chang, Feng-Tso Chien, Ching-Hwa Cheng:
Fine resolution double edge clipping with calibration technique for built-in at-speed delay testing. ASP-DAC 2010: 367-368
Coauthor Index
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