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Zaid Al-Ars
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Publications
- 2013
- [c53]Sohaib Majzoub, Zaid Al-Ars, Said Hamdioui:
Reducing random-dopant fluctuation impact on core-speed and power variability in many-core platforms. IDT 2013: 1-6 - 2011
- [c46]Said Hamdioui, Venkataraman Krishnaswami, Ijeoma Sandra Irobi, Zaid Al-Ars:
A New Test Paradigm for Semiconductor Memories in the Nano-Era. Asian Test Symposium 2011: 347-352 - [c45]Sandra Irobi, Zaid Al-Ars, Said Hamdioui, Claude Thibeault:
Testing for Parasitic Memory Effect in SRAMs. Asian Test Symposium 2011: 407-412 - [c44]Sandra Irobi, Zaid Al-Ars, Said Hamdioui, Michel Renovell:
Influence of parasitic memory effect on single-cell faults in SRAMs. DDECS 2011: 159-162 - [c42]Sandra Irobi, Zaid Al-Ars, Said Hamdioui:
Memory Test Optimization for Parasitic Bit Line Coupling in SRAMs. ETS 2011: 205 - 2010
- [c37]Sandra Irobi, Zaid Al-Ars, Said Hamdioui:
Detecting memory faults in the presence of bit line coupling in SRAM devices. ITC 2010: 437-446 - [c35]Sandra Irobi, Zaid Al-Ars, Said Hamdioui:
Bit line coupling memory tests for single-cell fails in SRAMs. VTS 2010: 27-32 - 2009
- [c34]Ad J. van de Goor, Said Hamdioui, Georgi Nedeltchev Gaydadjiev, Zaid Al-Ars:
New Algorithms for Address Decoder Delay Faults and Bit Line Imbalance Faults. Asian Test Symposium 2009: 391-396 - [c33]Zaid Al-Ars, Said Hamdioui:
Fault Diagnosis Using Test Primitives in Random Access Memories. Asian Test Symposium 2009: 403-408 - 2008
- [j7]Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev, Stamatis Vassiliadis:
Test Set Development for Cache Memory in Modern Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. 16(6): 725-732 (2008) - [c30]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georg Mueller:
Defect Oriented Testing of the Strap Problem Under Process Variations in DRAMs. ITC 2008: 1-10 - 2007
- [c29]Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev:
Manifestation of Precharge Faults in High Speed DRAM Devices. DDECS 2007: 179-184 - [c28]Said Hamdioui, Zaid Al-Ars, Javier Jiménez, Jose Calero:
PPM Reduction on Embedded Memories in System on Chip. ETS 2007: 85-90 - [c27]Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev:
Optimizing Test Length for Soft Faults in DRAM Devices. VTS 2007: 59-66 - 2006
- [j6]Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor:
Opens and Delay Faults in CMOS RAM Address Decoders. IEEE Trans. Computers 55(12): 1630-1639 (2006) - [j5]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Sultan M. Al-Harbi:
Influence of Bit-Line Coupling and Twisting on the Faulty Behavior of DRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2989-2996 (2006) - [c26]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor:
Space of DRAM fault models and corresponding testing. DATE 2006: 1252-1257 - [c25]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georgi Gaydadjiev, Jörg E. Vollrath:
DRAM-Specific Space of Memory Tests. ITC 2006: 1-10 - 2005
- [c24]Zaid Al-Ars, Said Hamdioui, Jörg E. Vollrath:
Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach. Asian Test Symposium 2005: 434-439 - [c23]Zaid Al-Ars, Said Hamdioui, Georg Mueller, Ad J. van de Goor:
Framework for Fault Analysis and Test Generation in DRAMs. DATE 2005: 1020-1021 - [c22]Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Rob Wadsworth:
Impact of stresses on the fault coverage of memory tests. MTDT 2005: 103-108 - 2004
- [j4]Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers:
Linked faults in random access memories: concept, fault models, test algorithms, and industrial results. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(5): 737-757 (2004) - [c21]Said Hamdioui, John Delos Reyes, Zaid Al-Ars:
Evaluation of Intra-Word Faults in Word-Oriented RAMs. Asian Test Symposium 2004: 283-288 - [c19]Ad J. van de Goor, Said Hamdioui, Zaid Al-Ars:
Tests for address decoder delay faults in RAMs due to inter-gate opens. ETS 2004: 146-151 - [c18]Ad J. van de Goor, Said Hamdioui, Zaid Al-Ars:
The Effectiveness of the Scan Test and Its New Variants. MTDT 2004: 26-31 - [c16]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor:
Effects of Bit Line Coupling on the Faulty Behavior of DRAMs. VTS 2004: 117-122 - 2003
- [j3]Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers:
Dynamic Faults in Random-Access-Memories: Concept, Fault Models and Tests. J. Electron. Test. 19(2): 195-205 (2003) - [c14]Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers:
March SL: A Test For All Static Linked Memory Faults. Asian Test Symposium 2003: 372-377 - [c11]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor:
A Fault Primitive Based Analysis of Linked Faults in RAMs. MTDT 2003: 33- - 2002
- [c8]Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor:
Testing Static and Dynamic Faults in Random Access Memories. VTS 2002: 395-400
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