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Wei-Ming Chen
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Publications
- 2024
- [j31]Po-Yuan Chou, Wei-Ming Chen, Shen-Iuan Liu:
A 16-Gb/s Baud-Rate CDR Circuit With One-Tap Speculative DFE and Wide Frequency Capture Range. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 480-484 (2024) - [c44]Ji Lin, Jiaming Tang, Haotian Tang, Shang Yang, Wei-Ming Chen, Wei-Chen Wang, Guangxuan Xiao, Xingyu Dang, Chuang Gan, Song Han:
AWQ: Activation-aware Weight Quantization for On-Device LLM Compression and Acceleration. MLSys 2024 - [i7]Ji Lin, Ligeng Zhu, Wei-Ming Chen, Wei-Chen Wang, Song Han:
Tiny Machine Learning: Progress and Futures. CoRR abs/2403.19076 (2024) - 2023
- [c43]Ligeng Zhu, Lanxiang Hu, Ji Lin, Wei-Ming Chen, Wei-Chen Wang, Chuang Gan, Song Han:
PockEngine: Sparse and Efficient Fine-tuning in a Pocket. MICRO 2023: 1381-1394 - [i6]Ligeng Zhu, Lanxiang Hu, Ji Lin, Wei-Chen Wang, Wei-Ming Chen, Chuang Gan, Song Han:
PockEngine: Sparse and Efficient Fine-tuning in a Pocket. CoRR abs/2310.17752 (2023) - 2022
- [j30]Wei-Che Tsai, Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Intermittent-Aware Distributed Concurrency Control. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3721-3732 (2022) - [j29]Wei-Ming Chen, Yun-Sheng Yao, Shen-Iuan Liu:
A 20-Gb/s Jitter-Tolerance-Enhanced Digital CDR With One-Tap DFE. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 894-898 (2022) - [c42]Yihan Wang, Muyang Li, Han Cai, Wei-Ming Chen, Song Han:
Lite Pose: Efficient Architecture Design for 2D Human Pose Estimation. CVPR 2022: 13116-13126 - [c41]Ji Lin, Ligeng Zhu, Wei-Ming Chen, Wei-Chen Wang, Chuang Gan, Song Han:
On-Device Training Under 256KB Memory. NeurIPS 2022 - [i5]Yihan Wang, Muyang Li, Han Cai, Wei-Ming Chen, Song Han:
Lite Pose: Efficient Architecture Design for 2D Human Pose Estimation. CoRR abs/2205.01271 (2022) - [i4]Ji Lin, Ligeng Zhu, Wei-Ming Chen, Wei-Chen Wang, Chuang Gan, Song Han:
On-Device Training Under 256KB Memory. CoRR abs/2206.15472 (2022) - 2021
- [j28]Wei-Ming Chen, Yun-Sheng Yao, Shen-Iuan Liu:
A 10.4-16-Gb/s Reference-Less Baud-Rate Digital CDR With One-Tap DFE Using a Wide-Range FD. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4566-4575 (2021) - [j27]Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Heterogeneity-aware Multicore Synchronization for Intermittent Systems. ACM Trans. Embed. Comput. Syst. 20(5s): 61:1-61:22 (2021) - [c40]Ji Lin, Wei-Ming Chen, Han Cai, Chuang Gan, Song Han:
Memory-efficient Patch-based Inference for Tiny Deep Learning. NeurIPS 2021: 2346-2358 - [i3]Ji Lin, Wei-Ming Chen, Han Cai, Chuang Gan, Song Han:
MCUNetV2: Memory-Efficient Patch-based Inference for Tiny Deep Learning. CoRR abs/2110.15352 (2021) - 2020
- [j26]Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Enabling Failure-Resilient Intermittent Systems Without Runtime Checkpointing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4399-4412 (2020) - [c38]Ji Lin, Wei-Ming Chen, Yujun Lin, John Cohn, Chuang Gan, Song Han:
MCUNet: Tiny Deep Learning on IoT Devices. NeurIPS 2020 - [i2]Ji Lin, Wei-Ming Chen, Yujun Lin, John Cohn, Chuang Gan, Song Han:
MCUNet: Tiny Deep Learning on IoT Devices. CoRR abs/2007.10319 (2020) - 2019
- [j24]Wei-Ming Chen, Sheng-Wei Cheng, Pi-Cheng Hsiu:
A User-Centric CPU-GPU Governing Framework for 3-D Mobile Games. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 961-974 (2019) - [c37]Yu-Chuan Chang, Wei-Ming Chen, Pi-Cheng Hsiu, Yen-Yu Lin, Tei-Wei Kuo:
LSIM: Ultra Lightweight Similarity Measurement for Mobile Graphics Applications. DAC 2019: 25 - [c36]Wei-Ming Chen, Pi-Cheng Hsiu, Tei-Wei Kuo:
Enabling Failure-resilient Intermittently-powered Systems Without Runtime Checkpointing. DAC 2019: 104 - [c35]Wei-Ming Chen, Yi-Ting Chen, Pi-Cheng Hsiu, Tei-Wei Kuo:
Multiversion Concurrency Control on Intermittent Systems. ICCAD 2019: 1-8 - [i1]Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Enabling Failure-resilient Intermittent Systems Without Runtime Checkpointing. CoRR abs/1910.04949 (2019) - 2018
- [j23]Cheng-Hsiang Cheng, Ping-Yuan Tsai, Tzu-Yi Yang, Wan-Hsueh Cheng, Ting-Yang Yen, Zhicong Luo, Xin-Hong Qian, Zhi-Xin Chen, Tzu-Han Lin, Wei-Hong Chen, Wei-Ming Chen, Sheng-Fu Liang, Fu-Zen Shaw, Cheng-Siu Chang, Yue-Loong Hsin, Chen-Yi Lee, Ming-Dou Ker, Chung-Yu Wu:
A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control. IEEE J. Solid State Circuits 53(11): 3314-3326 (2018) - [c33]Chih-Hsuan Yen, Wei-Ming Chen, Pi-Cheng Hsiu, Tei-Wei Kuo:
Differentiated handling of physical scenes and virtual objects for mobile augmented reality. ICCAD 2018: 36 - [c32]Hashan R. Mendis, Wei-Ming Chen, Leandro Soares Indrusiak, Tei-Wei Kuo, Pi-Cheng Hsiu:
Impact of memory frequency scaling on user-centric smartphone workloads. SAC 2018: 567-574 - 2017
- [c31]Chung-Yu Wu, Cheng-Hsiang Cheng, Yi-Huan Ou-Yang, Chiung-Ghu Chen, Wei-Ming Chen, Ming-Dou Ker, Chen-Yi Lee, Sheng-Fu Liang, Fu-Zen Shaw:
Design considerations and clinical applications of closed-loop neural disorder control SoCs. ASP-DAC 2017: 295-298 - 2016
- [j21]Pi-Cheng Hsiu, Po-Hsien Tseng, Wei-Ming Chen, Chin-Chiang Pan, Tei-Wei Kuo:
User-Centric Scheduling and Governing on Mobile Devices with big.LITTLE Processors. ACM Trans. Embed. Comput. Syst. 15(1): 17:1-17:22 (2016) - [c29]Ya-Syuan Sung, Wei-Ming Chen, Chung-Yu Wu:
The design of 8-channel CMOS area-efficient low-power current-mode analog front-end amplifier for EEG signal recording. ISCAS 2016: 530-533 - [c27]Wei-Ming Chen, Taisheng Cheng, Pi-Cheng Hsiu, Tei-Wei Kuo:
Value-Based Task Scheduling for Nonvolatile Processor-Based Embedded Devices. RTSS 2016: 247-256 - 2015
- [c25]Wei-Ming Chen, Sheng-Wei Cheng, Pi-Cheng Hsiu, Tei-Wei Kuo:
A User-Centric CPU-GPU Governing Framework for 3D Games on Mobile Devices. ICCAD 2015: 224-231 - [c24]Jung-Chen Chung, Wei-Ming Chen, Chung-Yu Wu:
An 8-channel power-efficient time-constant-enhanced analog front-end amplifier for neural signal acquisition. ISCAS 2015: 1234-1237 - 2014
- [j20]Wei-Ming Chen, Herming Chiueh, Tsan-Jieh Chen, Chia-Lun Ho, Chi Jeng, Ming-Dou Ker, Chun-Yu Lin, Ya-Chun Huang, Chia-Wei Chou, Tsun-Yuan Fan, Ming-Seng Cheng, Yue-Loong Hsin, Sheng-Fu Liang, Yu-Lin Wang, Fu-Zen Shaw, Yu-Hsing Huang, Chia-Hsiang Yang, Chung-Yu Wu:
A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control. IEEE J. Solid State Circuits 49(1): 232-247 (2014) - [j19]Chung-Yu Wu, Xin-Hong Qian, Ming-Seng Cheng, Yu-An Liang, Wei-Ming Chen:
A 13.56 MHz 40 mW CMOS High-Efficiency Inductive Link Power Supply Utilizing On-Chip Delay-Compensated Voltage Doubler Rectifier and Multiple LDOs for Implantable Medical Devices. IEEE J. Solid State Circuits 49(11): 2397-2407 (2014) - [c23]Yi-Xiao Wang, Wei-Ming Chen, Chung-Yu Wu:
A 65nm CMOS low-power MedRadio-band integer-N cascaded phase-locked loop for implantable medical systems. EMBC 2014: 642-645 - 2013
- [j13]Chung-Yu Wu, Wei-Ming Chen, Liang-Ting Kuo:
A CMOS Power-Efficient Low-Noise Current-Mode Front-End Amplifier for Neural Signal Recording. IEEE Trans. Biomed. Circuits Syst. 7(2): 107-114 (2013) - [c20]Yu-Yu Liao, Wei-Ming Chen, Chung-Yu Wu:
A CMOS MedRadio-band low-power integer-N cascaded phase-locked loop for implantable medical SOCs. BioCAS 2013: 286-289 - [c17]Yuan-Fu Lyu, Chung-Yu Wu, Li-Chen Liu, Wei-Ming Chen:
A Low power 10bit 500kS/s delta-modulated SAR ADC (DMSAR ADC) for implantable medical devices. ISCAS 2013: 2046-2049 - [c16]Wei-Ming Chen, Herming Chiueh, Tsan-Jieh Chen, Chia-Lun Ho, Chi Jeng, Shun-Ting Chang, Ming-Dou Ker, Chun-Yu Lin, Ya-Chun Huang, Chia-Wei Chou, Tsun-Yuan Fan, Ming-Seng Cheng, Sheng-Fu Liang, Tzu-Chieh Chien, Sih-Yen Wu, Yu-Lin Wang, Fu-Zen Shaw, Yu-Hsing Huang, Chia-Hsiang Yang, Jin-Chern Chiou, Chih-Wei Chang, Lei-Chun Chou, Chung-Yu Wu:
A fully integrated 8-channel closed-loop neural-prosthetic SoC for real-time epileptic seizure control. ISSCC 2013: 286-287 - 2012
- [c14]Wei-Ming Chen, Chung-Yu Wu:
Live demonstration: The implementation of CMOS biopotential signal recording systems. BioCAS 2012: 83 - [c11]Wei-Ming Chen, Liang-Ting Kuo, Chung-Yu Wu:
A low-power current-mode front-end acquisition system for biopotential signal recording. ISCAS 2012: 842-845 - 2011
- [c8]Wei-Ming Chen, Wen-Chia Yang, Tzung-Yun Tsai, Herming Chiueh, Chung-Yu Wu:
The design of CMOS general-purpose analog front-end circuit with tunable gain and bandwidth for biopotential signal recording systems. EMBC 2011: 4784-4787 - 2010
- [j11]Wei-Ming Chen, Wen-Lin Chang, Chia-Chen Chang:
Diagnostic System for 3D Ultrasonography Based on Gabor Filter. J. Multim. 5(6): 613-621 (2010)
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last updated on 2024-08-03 21:16 CEST by the dblp team
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