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ORCIDYatin A. Manerkar
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2020 – today
- 2024
[c11]Adwait Godbole
, Kevin Cheang, Yatin A. Manerkar, Sanjit A. Seshia:
Lifting Micro-Update Models from RTL for Formal Security Analysis. ASPLOS (2) 2024: 631-648- [i6]Adwait Godbole, Yatin A. Manerkar, Sanjit A. Seshia:
SemPat: Using Hyperproperty-based Semantic Analysis to Generate Microarchitectural Attack Patterns. CoRR abs/2406.05403 (2024) - 2023
- [j3]Jennifer Brana, Brian C. Schwedock, Yatin A. Manerkar, Nathan Beckmann:
Kobold: Simplified Cache Coherence for Cache-Attached Accelerators. IEEE Comput. Archit. Lett. 22(1): 41-44 (2023) - [j2]Shaokai Lin, Yatin A. Manerkar, Marten Lohstroh, Elizabeth Polgreen, Sheng-Jung Yu, Chadlia Jerad, Edward A. Lee, Sanjit A. Seshia:
Towards Building Verifiable CPS using Lingua Franca. ACM Trans. Embed. Comput. Syst. 22(5s): 155:1-155:24 (2023) - [c10]Chase Norman, Adwait Godbole, Yatin A. Manerkar:
PipeSynth: Automated Synthesis of Microarchitectural Axioms for Memory Consistency. ASPLOS (3) 2023: 513-527 - [c9]Adwait Godbole, Leiqi Ye, Yatin A. Manerkar, Sanjit A. Seshia:
Modelling and Verification of Security-Oriented Resource Partitioning Schemes. FMCAD 2023: 268-273 - 2022
- [c8]Elizabeth Polgreen, Kevin Cheang, Pranav Gaddamadugu, Adwait Godbole, Kevin Laeufer, Shaokai Lin, Yatin A. Manerkar, Federico Mora, Sanjit A. Seshia:
UCLID5: Multi-modal Formal Modeling, Verification, and Synthesis. CAV (1) 2022: 538-551 - [c7]Adwait Godbole, Yatin A. Manerkar, Sanjit A. Seshia:
Automated Conversion of Axiomatic to Operational Models: Theory and Practice. FMCAD 2022: 331-342 - [c6]Kevin Loughlin, Stefan Saroiu, Alec Wolman, Yatin A. Manerkar, Baris Kasikci:
MOESI-prime: preventing coherence-induced hammering in commodity workloads. ISCA 2022: 670-684 - [i5]Elizabeth Polgreen, Kevin Cheang, Pranav Gaddamadugu, Adwait Godbole, Kevin Laeufer, Shaokai Lin, Yatin A. Manerkar, Federico Mora, Sanjit A. Seshia:
UCLID5: Multi-Modal Formal Modeling, Verification, and Synthesis. CoRR abs/2208.03699 (2022) - [i4]Adwait Godbole, Yatin A. Manerkar, Sanjit A. Seshia:
Automated Conversion of Axiomatic to Operational Models: Theory and Practice. CoRR abs/2208.06733 (2022) - 2021
- [b1]Yatin A. Manerkar:
Progressive Automated Formal Verification of Memory Consistency in Parallel Processors. Princeton University, USA, 2021 - 2020
- [i3]Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi:
RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification. CoRR abs/2003.04892 (2020)
2010 – 2019
- 2018
- [j1]Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi:
Full-Stack Memory Model Verification with TriCheck. IEEE Micro 38(3): 58-68 (2018) - [c5]Hongce Zhang, Caroline Trippel, Yatin A. Manerkar, Aarti Gupta, Margaret Martonosi, Sharad Malik:
ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification. FMCAD 2018: 1-10 - [c4]Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi, Aarti Gupta:
PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications. MICRO 2018: 788-801 - 2017
- [c3]Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi:
TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA. ASPLOS 2017: 119-133 - [c2]Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi, Michael Pellauer:
RTLcheck: verifying the memory consistency of RTL designs. MICRO 2017: 463-476 - 2016
- [i2]Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi:
Exploring the Trisection of Software, Hardware, and ISA in Memory Model Design. CoRR abs/1608.07547 (2016) - [i1]Yatin A. Manerkar, Caroline Trippel, Daniel Lustig, Michael Pellauer, Margaret Martonosi:
Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings. CoRR abs/1611.01507 (2016) - 2015
- [c1]Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi:
CCICheck: using µhb graphs to verify the coherence-consistency interface. MICRO 2015: 26-37
Coauthor Index
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