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ORCID12th LATW 2011: Porto de Galinhas, Brazil
- 12th Latin American Test Workshop, LATW 2011, Beach of Porto de Galinhas, Brazil, March 27-30, 2011. IEEE 2011, ISBN 978-1-4577-1488-7
- Karine Castellani-Coulié, Jean-Michel Portal, Gilles Micolau, Hassen Aziza:
Analysis of SEU parameters for the study of SRAM cells reliability under radiation. 1-5 - Vladimir Pasca, Lorena Anghel
, Mounir Benabdenbi:
Configurable Thru-Silicon-Via interconnect Built-In Self-Test and diagnosis. 1-6 - Andreia M. dos Santos, Börje F. Karlsson, André M. Cavalcante, Igor B. Correia, Emanuel Silva:
Testing in an agile product development environment: An industry experience report. 1-6 - Wilson J. Pérez H., Ernesto Sánchez, Matteo Sonza Reorda, Alberto Tonda, Jaime Velasco-Medina:
Functional test generation for the pLRU replacement mechanism of embedded cache memories. 1-6 - Cristina Ciprandi Menegotto, Taisy Silva Weber:
Communication fault injection for multi-protocol Java applications testing. 1-6 - Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau, Fabian Vargas:
Formally verifying an RTOS scheduling monitor IP core in embedded systems. 1-6 - Frank Sill Torres, Claas Cornelius, Dirk Timmermann:
Reliability enhancement via Sleep Transistors. 1-6 - Pablo A. Petrashin, Carlos Dualibe:
An improved OBT strategy for untuned continuous-time analog filters. 1-5 - Mikhail M. Chupilko, Alexander Kamkin:
A TLM-based approach to functional verification of hardware components at different abstraction levels. 1-6 - Janine Kniess, Orlando Loques, Célio Vinicius N. de Albuquerque:
A fault-tolerant service discovery protocol for emergency search and rescue missions. 1-6 - Luigi Dilillo, Paolo Rech, Jean-Marc Gallière, Patrick Girard, Frederic Wrobel, Frédéric Saigné:
Neutron detection in atmospheric environment through static and dynamic SRAM-based test bench. 1-6 - Jorge Arturo Corso Sarmiento, Francisco Javier Ramirez Fernandez:
Methodology and platform for fault co-emulation. 1-6 - Alfredo Olmos, Andre Vilas Boas, Eduardo Ribeiro da Silva, José Carlos da Silva, Ricardo Maltione:
Impact of RF-based fault injection in Pierce-type crystal oscillators under EMC standard tests in microcontrollers. 1-8 - Ahmed Amine Rekik, Florence Azaïs, Norbert Dumas, Frédérick Mailly, Pascal Nouet:
Test and calibration of MEMS convective accelerometers with a fully electrical setup. 1-6 - Sven Rosinger, Malte Metzdorf, Domenik Helms, Wolfgang Nebel:
Behavioral-level thermal- and aging-estimation flow. 1-6 - Ernesto Sánchez, Matteo Sonza Reorda:
On the functional test of MESI controllers. 1-6 - Sobeeh Almukhaizim, Ozgur Sinanoglu:
Error-resilient design of branch predictors for effective yield improvement. 1-6 - Sobeeh Almukhaizim, Eman AlQuraishi, Ozgur Sinanoglu:
Test power reduction via deterministic alignment of stimulus and response bits. 1-6 - Sonia Ben Dhia, Alexandre Boyer, Bertrand Vrignon, Mikaël Deobarro:
IC immunity modeling process validation using on-chip measurements. 1-6 - Martin Chloupek, Ondrej Novák:
Scan chain configuration method for broadcast decompressor architecture. 1-5 - José Rodrigo Azambuja, Angelo Cardoso Lapolli, Maurício Altieri, Fernanda Lima Kastensmidt:
Evaluating the efficiency of data-flow software-based techniques to detect SEEs in microprocessors. 1-6 - Suraj Sindia, Vishwani D. Agrawal, Virendra Singh:
Testing linear and non-linear analog circuits using moment generating functions. 1-6 - Raoul Velazco, Gilles Foucard, Fabrice Pancher, Wassim Mansour, Greicy Marques-Costa, Devan Sohier, Alain Bui:
Robustness with respect to SEUs of a self-converging algorithm. 1-5 - L. A. Faria, L. F. M. Nohra, N. A. S. Gomes, F. D. P. Alves:
Modular and adaptative test-bed for infrared photodetectors. 1-6 - Marta Portela-García, Almudena Lindoso, Luis Entrena, Mario García-Valderas, Celia López-Ongil, Bernardo Pianta, Letícia Maria Bolzani Poehls, Fabian Vargas:
Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case study. 1-6 - Alexandre Rafael Lenz, Aurora T. R. Pozo, Silvia Regina Vergilio:
An approach for clustering test data. 1-6 - R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
On-line BIST for performance failure prediction under aging effects in automotive safety-critical applications. 1-6 - András Timár, Márta Rencz:
Studying the influence of chip temperatures on timing integrity. 1-5 - David Cuesta, José L. Risco-Martín, José L. Ayala, David Atienza:
3D Thermal-aware floorplanner for many-core single-chip systems. 1-6 - Anelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt:
Adaptive approach to tolerate multiple faulty links in Network-on-Chip. 1-6 - Djones Lettnin, Wolfgang Rosenstiel:
Hybrid verificatio of temporal properties in hardware dependent software. 1-6 - Wesley Klewerton Guez Assunção, Daniela de Freitas Guilhermino Trindade, Thelma Elita Colanzi, Silvia Regina Vergilio:
Evaluating test reuse of a software product line oriented strategy. 1-6 - Laurent Bousquet, Fabio Cenni, Emmanuel Simeu:
SystemC-AMS high-level modeling of linear analog blocks with power consumption information. 1-6 - Valerio Guarnieri, Nicola Bombieri, Graziano Pravadelli, Franco Fummi, Hanno Hantson, Jaan Raik, Maksim Jenihhin, Raimund Ubar:
Mutation analysis for SystemC designs at TLM. 1-6 - María Dolores Valdés, Judit Freijedo, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects. 1-7 - Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Modeling the effect of process variations on the timing response of nanometer digital circuits. 1-5 - Sebastian Siegl, Kai-Steffen Hielscher, Reinhard German, Christian Berger:
Automated testing of embedded automotive systems from requirement specification models. 1-6 - Jimmy Tarrillo, Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt:
Designing and analyzing a SpaceWire router IP for soft errors detection. 1-6 - Jorge L. Tonfat, Gustavo Neuberger, Ricardo Reis:
Functional verification of logic modules for a Gigabit Ethernet switch. 1-4 - José Augusto Miranda Nacif, Thiago S. F. Silva, Luiz Filipe M. Vieira, Alex Borges Vieira, Antônio Otávio Fernandes, Claudionor Nunes Coelho:
A cache based algorithm to predict HDL modules faults. 1-3 - Cesare Ferri, Dimitra Papagiannopoulou, R. Iris Bahar, Andrea Calimera:
NBTI-aware data allocation strategies for scratchpad memory based embedded systems. 1-6 - Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
Timing issues for an efficient use of concurrent error detection codes. 1-6 - Felipe Lavratti, Andrea Calimera, Letícia Maria Veiras Bolzani, Fabian Vargas, Enrico Macii:
A new Built-In Current Sensor scheme to detect dynamic faults in Nano-Scale SRAMs. 1-6 - Juliano Benfica, Letícia Maria Bolzani Poehls, Fabian Vargas, José Lipovetzky, Ariel Lutenberg, Sebastián E. García, Edmundo Gatti, Fernando Hernandez, Ney Laert Vilar Calazans:
Configurable platform for IC combined tests of total-ionizing dose radiation and electromagnetic immunity. 1-6 - Gilles Micolau, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
Impact of SEU configurations on a SRAM cell response at circuit level. 1-5 - Alexandre Boyer, Sonia Ben Dhia, Binhong Li, Christophe Lemoine, Bertrand Vrignon:
Prediction of long-term immunity of a phase-locked loop. 1-6 - Samuel Nascimento Pagliarini, Paulo André Haacke, Fernanda Lima Kastensmidt:
Evaluating coverage collection using the VEasy functional verification tool suite. 1-6 - Sylvie Jarrix, Laurent Dusseau, Nathalie Chatry, Patrick Hoffmann, Adrien Doridant, A. Blain, Tristan Dubois, Jérémy Raoult, Philippe Calvel:
First studies of the impact of dose radiation on the electromagnetic susceptibility of bipolar transistors. 1-4 - Tiago R. Balen, Guilherme Schwanke Cardoso, Odair Lelis Gonçalez, Marcelo Soares Lubaszewski:
Investigating the effects of transient faults in Programmable Capacitor Arrays. 1-6 - Vishwani D. Agrawal:
Testing for faults, looking for defects. 1
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