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Publication search results
found 126 matches
- 1994
- Ad J. van de Goor, Yervant Zorian, Ivo Schanstra:
Functional Tests for Ring-Address SRAM-type FIFOs. EDAC-ETC-EUROASIC 1994: 666 - Abdessatar Abderrahman, Bozena Kaminska, Yvon Savaria:
Estimation of Simultaneous Switching Power and Ground Noise of Static CMOS Combinational Circuits. EDAC-ETC-EUROASIC 1994: 658 - H. H. Ahmad, R. J. Mack:
AREAL: Automated Reasoning Expert for Analogue Layout. EDAC-ETC-EUROASIC 1994: 659 - Salman Ahmed, Peter Y. K. Cheung, Phil Collins:
A Model-based Approach to Analog Fault Diagnosis using Techniques from Optimisation. EDAC-ETC-EUROASIC 1994: 665 - Hitesh Ajuha, Premachandran R. Menon:
Delay Reduction by Segment Substitution. EDAC-ETC-EUROASIC 1994: 82-86 - J. Akita, K. Asada:
A Method for Reducing Power Consumption of CMOS Logic Based on Signal Transition Probability. EDAC-ETC-EUROASIC 1994: 420-424 - George Alexiou, Dimitrios Stiliadis, Nick Kanopoulos:
Design and Implementation of a High-Performance, Modular, Sorting Engine. EDAC-ETC-EUROASIC 1994: 2-8 - R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi:
Timing Analysis of Combinational Circuits using ADD's. EDAC-ETC-EUROASIC 1994: 625-629 - Alessandro Balboni, Claudio Costi, Franco Fummi, Donatella Sciuto:
From Behavioral Description to Systolic Array Based Architectures. EDAC-ETC-EUROASIC 1994: 657 - Savita Banerjee, Rabindra K. Roy, Srimat T. Chakradhar, Dhiraj K. Pradhan:
Signal Transition Graph Transformations for Initializability. EDAC-ETC-EUROASIC 1994: 670 - Gunnar Bartels, Peter M. Kist, Kees Schot, Mattie N. Sim:
Flow Management Requirements of a Test Harness for Testing the Reliability of an Electronic CAD System. EDAC-ETC-EUROASIC 1994: 605-609 - Bernd Becker, Rolf Drechsler:
Testability of Circuits Derived from Functional Decision Diagrams. EDAC-ETC-EUROASIC 1994: 667 - Jochen Bern, Jordan Gergov, Christoph Meinel, Anna Slobodová:
Boolean Manipulation with Free BDD's. First Experimental Results. EDAC-ETC-EUROASIC 1994: 200-207 - Sandeep Bhatia, Niraj K. Jha:
Genesis: A Behavioral Synthesis System for Hierarchical Testability. EDAC-ETC-EUROASIC 1994: 272-276 - Andrea Boni, Giovanni Chiorboli, G. Franco, S. Mazzoleni, M. Ostacoli:
Physical Modeling of Linearity Errors for the Diagnosis of High Resolution R-2R D/A Converters. EDAC-ETC-EUROASIC 1994: 664 - Daniel R. Brasen, Gabriele Saucier:
FPGA Partitioning for Critical Paths. EDAC-ETC-EUROASIC 1994: 99-103 - Ronn B. Brashear, Noel Menezes, Chanhee Oh, Lawrence T. Pillage, M. Ray Mercer:
Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis. EDAC-ETC-EUROASIC 1994: 332-337 - Peter T. Breuer, Luis Sánchez Fernández, Carlos Delgado Kloos:
Clean formal semantics for VHDL. EDAC-ETC-EUROASIC 1994: 641-647 - Luc Burgun, N. Dictus, Alain Greiner, E. Pradho, C. Sarwary:
Multilevel Logic Synthesis of Very High Complexity Circuits. EDAC-ETC-EUROASIC 1994: 669 - Eamonn Byrne, Oliver McCarthy, David Lucas, Brian Donnellan:
An Overview of Analogue Optimisation Using "AD-OPT". EDAC-ETC-EUROASIC 1994: 540-545 - Fermín Calvo, Pierre Plaza, Pedro Mateos:
ICM2 IC: a new ATM switching element for 2.48 Gb/s communications. EDAC-ETC-EUROASIC 1994: 65-69 - Paolo Camurati, Fulvio Corno, Paolo Prinetto, Catherine Bayol, Bernard Soulas:
System-Level Modeling and Verification: a Comprehensive Design Methodology. EDAC-ETC-EUROASIC 1994: 636-640 - Shih-Chieh Chang, David Ihsin Cheng, Malgorzata Marek-Sadowska:
Minimizing ROBDD Size of Incompletely Specified Multiple Output Functions. EDAC-ETC-EUROASIC 1994: 620-624 - Chih-Ang Chen, Sandeep K. Gupta:
BIST Test Pattern Generators for Stuck-Open and Delay Testing. EDAC-ETC-EUROASIC 1994: 289-296 - Ben Chen, Michihiro Yamazaki, Masahiro Fujita:
Bug Identification of a Real Chip Design by Symbolic Model Checking. EDAC-ETC-EUROASIC 1994: 132-136 - Brian Chess, Tracy Larrabee:
Generating Test Patterns for Bridge Faults in CMOS ICs. EDAC-ETC-EUROASIC 1994: 165-170 - Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi:
A State Space Decomposition Algorithm for Approximate FSM Traversal. EDAC-ETC-EUROASIC 1994: 137-141 - Pierre Coulomb, François Pogodalla:
PLFP256 A Pipelined Fourier Processor. EDAC-ETC-EUROASIC 1994: 245-249 - Mehmet Emin Dalkiliç, Vijay Pitchumani:
Optimal Operation Scheduling Using Resource Lower Bound Estimations. EDAC-ETC-EUROASIC 1994: 319-324 - Maurizio Damiani:
Nondeterministic finite-state machines and sequential don't cares. EDAC-ETC-EUROASIC 1994: 192-198
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