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Daisuke Suzuki
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2020 – today
- 2022
- [j36]Shun Hinatsu
, Daisuke Suzuki, Hiroki Ishizuka
, Sei Ikeda
, Osamu Oshiro:
Evaluation of PPG Feature Values Toward Biometric Authentication Against Presentation Attacks. IEEE Access 10: 41352-41361 (2022) - [j35]Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, Naofumi Homma:
Bypassing Isolated Execution on RISC-V using Side-Channel-Assisted Fault-Injection and Its Countermeasure. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 28-68 (2022) - [c51]Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino:
Towards Isolated AI Accelerators with OP-TEE on SoC-FPGAs. ACNS Workshops 2022: 200-217 - [c50]Daisuke Suzuki, Yujin Takahashi, Ikumi Yamashita, Taichi Aida, Tosho Hirasawa, Michitaka Nakatsuji, Masato Mita, Mamoru Komachi:
Construction of a Quality Estimation Dataset for Automatic Evaluation of Japanese Grammatical Error Correction. LREC 2022: 5565-5572 - [c49]Daisuke Suzuki, Takahiro Hanyu:
A Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI Accelerator. MCSoC 2022: 53-60 - [c48]Naoya Shiraishi, Yuji Sato, Yoshihiko Shibuya, Shinya Fujita, Toshinori Kuwahara, Daisuke Suzuki:
Attitude Control System Design of 3U CubeSat with Electrodynamic Tether for Post Mission Disposal Demonstration. SII 2022: 132-137 - [c47]Alperen Pala, Toshinori Kuwahara, Kohei Takeda, Yoshihiko Shibuya, Yuji Sato, Shinya Fujita, Daisuke Suzuki, Tetsuya Kaneko:
Orbital Maneuver Evaluation of Micro-satellite ALE-1 with a Separable Drag Sail. SII 2022: 877-881 - [c46]Toshinori Kuwahara, Alperen Pala, Adrien Potier, Yoshihiko Shibuya, Yuji Sato, Shinya Fujita, Daisuke Suzuki, Tetsuya Kaneko:
Orbital Demonstration of Gossamer Structure Shape Estimation using Time-of-Flight Camera System. SII 2022: 882-886 - [i8]Daisuke Suzuki, Yujin Takahashi, Ikumi Yamashita, Taichi Aida, Tosho Hirasawa, Michitaka Nakatsuji, Masato Mita, Mamoru Komachi:
Construction of a Quality Estimation Dataset for Automatic Evaluation of Japanese Grammatical Error Correction. CoRR abs/2201.08038 (2022) - 2021
- [j34]Tsunato Nakai, Daisuke Suzuki, Fumio Omatsu, Takeshi Fujino:
Adversarial Black-Box Attacks with Timing Side-Channel Leakage. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 104-A(1): 143-151 (2021) - [j33]Daisuke Suzuki, Takahiro Hanyu:
Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow. IEICE Trans. Inf. Syst. 104-D(8): 1111-1120 (2021) - [j32]Shoei Nashimoto
, Daisuke Suzuki, Noriyuki Miura, Tatsuya Machida, Kohei Matsuda, Makoto Nagata
:
Low-cost distance-spoofing attack on FMCW radar and its feasibility study on countermeasure. J. Cryptogr. Eng. 11(3): 289-298 (2021) - [j31]Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino:
Timing Black-Box Attacks: Crafting Adversarial Examples through Timing Leaks against DNNs on Embedded Devices. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021(3): 149-175 (2021) - [c45]Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino:
Towards Trained Model Confidentiality and Integrity Using Trusted Execution Environments. ACNS Workshops 2021: 151-168 - [c44]Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro:
Attack on PPG Biometrics: Presentation Attack by Stealth Recording and Waveform Estimation. EMBC 2021: 64-67 - [c43]Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu:
A Memory-Access-Minimized BCNN Accelerator Using Nonvolatile FPGA with Only-Once- Write Shifting. MCSoC 2021: 92-97 - [c42]Koichi Shimizu, Daisuke Suzuki, Ryo Muramatsu, Hisashi Mori, Tomoyuki Nagatsuka, Tsutomu Matsumoto:
Evaluation Framework for Performance Limitation of Autonomous Systems Under Sensor Attack. SAFECOMP 2021: 67-81 - [i7]Koichi Shimizu, Daisuke Suzuki, Ryo Muramatsu, Hisashi Mori, Tomoyuki Nagatsuka, Tsutomu Matsumoto:
Evaluation Framework for Performance Limitation of Autonomous Systems under Sensor Attack. CoRR abs/2103.07118 (2021) - 2020
- [c41]Daisuke Suzuki, Ayako Suzuki, Keiko Shimano, Kazuki Kiyota, Yutaka Kakizaki:
Analysis of Driving Performance Data Considering the Characteristics of Railway Stations. AHFE (12) 2020: 361-366 - [c40]Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro:
Photoplethysmographic Subject Identification by Considering Feature Values Derived from Heartbeat and Respiration. EMBC 2020: 902-905 - [c39]Tsubasa Takaki, Yang Li, Kazuo Sakiyama, Shoei Nashimoto, Daisuke Suzuki, Takeshi Sugawara
:
An Optimized Implementation of AES-GCM for FPGA Acceleration Using High-Level Synthesis. GCCE 2020: 176-180 - [c38]Daisuke Suzuki, Takahiro Hanyu:
Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA. ISMVL 2020: 194-199 - [i6]Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, Naofumi Homma:
Bypassing Isolated Execution on RISC-V with Fault Injection. IACR Cryptol. ePrint Arch. 2020: 1193 (2020)
2010 – 2019
- 2019
- [j30]Masanori Natsui
, Daisuke Suzuki, Akira Tamakoshi
, Toshinari Watanabe, Hiroaki Honjo
, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda
, Hideo Ohno
, Tetsuo Endoh, Takahiro Hanyu
:
A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications. IEEE J. Solid State Circuits 54(11): 2991-3004 (2019) - [j29]Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu:
Circuit optimization technique of nonvolatile logic-in-memory based lookup table circuits using magnetic tunnel junction devices. Microelectron. J. 83: 39-49 (2019) - [c37]Daisuke Suzuki, Naoki Mizukami, Yutaka Kakizaki, Nobuyuki Tsuyuki:
Analysis of Driving Performance Data to Evaluate Brake Manipulation by Railway Drivers. AHFE (13) 2019: 282-288 - [c36]Noriyuki Miura, Tatsuya Machida, Kohei Matsuda, Makoto Nagata
, Shoei Nashimoto, Daisuke Suzuki:
A Low-Cost Replica-Based Distance-Spoofing Attack on mmWave FMCW Radar. ASHES@CCS 2019: 95-100 - [c35]Masanori Natsui
, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda
, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu:
An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz. ISSCC 2019: 202-204 - [i5]Yusuke Naito, Mitsuru Matsui, Takeshi Sugawara
, Daisuke Suzuki:
SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation. IACR Cryptol. ePrint Arch. 2019: 700 (2019) - 2018
- [j28]Yusuke Naito, Mitsuru Matsui, Takeshi Sugawara
, Daisuke Suzuki:
SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(2): 192-217 (2018) - [c34]Shoei Nashimoto, Daisuke Suzuki, Takeshi Sugawara
, Kazuo Sakiyama:
Sensor CON-Fusion: Defeating Kalman Filter in Signal Injection Attack. AsiaCCS 2018: 511-524 - [c33]Daisuke Suzuki, Takahiro Hanyu:
Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA: (Abstract Only). FPGA 2018: 291 - [c32]Hisae Suenaga, Haruka Minato, Daisuke Suzuki, Yoshitake Akiyama:
Aggregation of Charged Microgels by Relatively Diamagnetic Assembly. MHS 2018: 1-2 - 2017
- [j27]Daisuke Suzuki, Takahiro Hanyu:
Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. IEICE Trans. Inf. Syst. 100-D(8): 1618-1624 (2017) - [c31]Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Masanori Natsui
:
Three-terminal MTJ-based nonvolatile logic circuits with self-terminated writing mechanism for ultra-low-power VLSI processor. DATE 2017: 548-553 - 2016
- [j26]Takeshi Sugawara
, Daisuke Suzuki, Minoru Saeki:
Asymmetric Leakage from Multiplier and Collision-Based Single-Shot Side-Channel Attack. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7): 1323-1333 (2016) - [j25]Takahiro Hanyu
, Tetsuo Endoh, Daisuke Suzuki, Hiroki Koike, Yitao Ma, Naoya Onizawa, Masanori Natsui
, Shoji Ikeda
, Hideo Ohno:
Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing. Proc. IEEE 104(10): 1844-1863 (2016) - [c30]Kohei Kurihara, Yoshitaka Toyoda, Shotaro Moriya, Daisuke Suzuki, Takeo Fujita, Narihiro Matoba, Jay E. Thorton, Fatih Porikli:
Light-Weight Single Image Super-Resolution via Pattern-wise Regression Function. Digital Photography and Mobile Imaging 2016: 1-7 - [c29]Daisuke Suzuki, Takahiro Hanyu:
A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure. FPL 2016: 1-4 - [c28]Daisuke Suzuki, Akihiko Yoneya:
Zero-cross switching control of halogen lamp heater with delta-sigma modulator. IECON 2016: 377-381 - [c27]Daisuke Suzuki, Takahiro Hanyu:
Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. ISMVL 2016: 5-10 - 2015
- [j24]Taisuke Izumi, Daisuke Suzuki:
Faster Enumeration of All Maximal Cliques in Unit Disk Graphs Using Geometric Structure. IEICE Trans. Inf. Syst. 98-D(3): 490-496 (2015) - [j23]Takeshi Sugawara
, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino:
Reversing stealthy dopant-level circuits. J. Cryptogr. Eng. 5(2): 85-94 (2015) - [j22]Masanori Natsui
, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji
, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo
, Keizo Kinoshita, Shoji Ikeda
, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction. IEEE J. Solid State Circuits 50(2): 476-489 (2015) - [c26]Takeshi Sugawara
, Daisuke Suzuki, Minoru Saeki:
Two Operands of Multipliers in Side-Channel Attack. COSADE 2015: 64-78 - [c25]Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Shoun Matsunaga, Masanori Natsui, Akira Mochizuki:
Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm. DATE 2015: 1006-1011 - [c24]Koichi Shimizu, Takeshi Sugawara
, Daisuke Suzuki:
PUF as a sensor. GCCE 2015: 88-92 - [c23]Daisuke Suzuki, Takahiro Hanyu:
Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure. MWSCAS 2015: 1-4 - [c22]Takumi Ninomiya, Akihito Fujita, Daisuke Suzuki, Hiroyuki Umemuro
:
Development of the Multi-dimensional Robot Attitude Scale: Constructs of People's Attitudes Towards Domestic Robots. ICSR 2015: 482-491 - [c21]Daisuke Suzuki, Masanori Natsui
, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Hideo Sato, Shunsuke Fukami
, Shoji Ikeda
, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure. VLSIC 2015: 172- - [i4]Takeshi Sugawara
, Daisuke Suzuki, Minoru Saeki:
Two Operands of Multipliers in Side-Channel Attack. IACR Cryptol. ePrint Arch. 2015: 291 (2015) - 2014
- [j21]Daisuke Suzuki, Noboru Sakimura, Masanori Natsui
, Akira Mochizuki, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
A compact low-power nonvolatile flip-flop using domain-wall-motion-device-based single-ended structure. IEICE Electron. Express 11(13): 20140296 (2014) - [j20]Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
, Takeshi Sugawara
, Mitsuru Shiozaki, Takeshi Fujino:
Unified Coprocessor Architecture for Secure Key Storage and Challenge-Response Authentication. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(1): 264-274 (2014) - [j19]Takeshi Sugawara
, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino:
On measurable side-channel leaks inside ASIC design primitives. J. Cryptogr. Eng. 4(1): 59-73 (2014) - [c20]Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino:
Reversing Stealthy Dopant-Level Circuits. CHES 2014: 112-126 - [i3]Takeshi Sugawara
, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino:
Reversing Stealthy Dopant-Level Circuits. IACR Cryptol. ePrint Arch. 2014: 508 (2014) - 2013
- [j18]Daisuke Suzuki, Masanori Natsui
, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo
, Keizo Kinoshita, Hideo Sato, Shoji Ikeda
, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications. IEICE Electron. Express 10(23): 20130772 (2013) - [j17]Mitsuru Ohtake, Daisuke Suzuki, Fumiyoshi Kirino, Masaaki Futamoto:
Metastable Ordered Phase Formation in CoPt and Co3Pt Alloy Thin Films Epitaxially Grown on Single-Crystal Substrates. IEICE Trans. Electron. 96-C(12): 1460-1468 (2013) - [j16]Daisuke Suzuki, Fumihiro Itoigawa
, Keiichi Kawata, Takashi Nakamura:
Using Pulse Laser Processing to Shape Cutting Edge of PcBN Tool for High-Precision Turning of Hardened Steel. Int. J. Autom. Technol. 7(3): 337-344 (2013) - [c19]Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino:
On Measurable Side-Channel Leaks Inside ASIC Design Primitives. CHES 2013: 159-178 - [c18]Masanori Natsui
, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji
, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo
, Keizo Kinoshita, Shoji Ikeda
, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating. ISSCC 2013: 194-195 - [c17]Yoshitaka Toyoda, Daisuke Suzuki, Koichi Yamashita, Takashi Ito, Narihiro Matoba, Tetsuya Kuno, Hiroaki Sugiura:
A visibility improvement technique for fog images suitable for real-time application. Real-Time Image and Video Processing 2013: 86560Q - [c16]Akihito Fujita, Daisuke Suzuki, Hiroyuki Umemuro
:
Cross-regional comparative study of dimensions of people's attitudes toward robots. RO-MAN 2013: 332-333 - [i2]Takeshi Sugawara
, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino:
On Measurable Side-Channel Leaks inside ASIC Design Primitives. IACR Cryptol. ePrint Arch. 2013: 579 (2013) - 2012
- [j15]Koichi Shimizu, Daisuke Suzuki, Tomomi Kasuya:
Glitch PUF: Extracting Information from Usually Unwanted Glitches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(1): 223-233 (2012) - [c15]Takeshi Sugawara
, Daisuke Suzuki, Toshihiro Katashita
:
Circuit Simulation for Fault Sensitivity Analysis and Its Application to Cryptographic LSI. FDTC 2012: 16-23 - [c14]Daisuke Suzuki, Hiroyuki Umemuro
:
Dimensions of people's attitudes toward robots. HRI 2012: 249-250 - [c13]Luca Montesi
, Zeljko Zilic, Takahiro Hanyu, Daisuke Suzuki:
Building Blocks to Use in Innovative Non-volatile FPGA Architecture Based on MTJs. ISVLSI 2012: 302-307 - [c12]Daisuke Suzuki, Masanori Natsui
, Takahiro Hanyu:
Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA. MWSCAS 2012: 334-337 - 2011
- [j14]Daisuke Suzuki, Minoru Saeki, Koichi Shimizu, Tsutomu Matsumoto:
How to Decide Selection Functions for Power Analysis: From the Viewpoint of Hardware Architecture of Block Ciphers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(1): 200-210 (2011) - [j13]Daisuke Suzuki, Tsutomu Matsumoto:
How to Maximize the Potential of FPGA-Based DSPs for Modular Exponentiation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(1): 211-222 (2011) - 2010
- [j12]Minoru Sakairi, Daisuke Suzuki, Ayako Nishimura, Yukiko Ichige, Masashi Kiguchi
:
Simultaneous detection of breath and alcohol using breath-alcohol sensor for prevention of drunk driving. IEICE Electron. Express 7(6): 467-472 (2010) - [j11]Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
:
High-Speed Passphrase Search System for PGP. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(1): 202-209 (2010) - [j10]Ayako Nishimura, Minoru Sakairi, Daisuke Suzuki:
Increasing the Strength of Odors Produced by an Odor-Emitting Technology Using Odor Capsules. IEICE Trans. Inf. Syst. 93-D(4): 903-908 (2010) - [j9]Daisuke Suzuki, Minoru Saeki, Koichi Shimizu, Akashi Satoh, Tsutomu Matsumoto:
A Design Methodology for a DPA-Resistant Circuit with RSL Techniques. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2497-2508 (2010) - [j8]Daisuke Suzuki, Hiroki Irieda
, Michio Homma, Ikuro Kawagishi, Yuki Sudo
:
Phototactic and Chemotactic Signal Transduction by Transmembrane Receptors and Transducers in Microorganisms. Sensors 10(4): 4010-4039 (2010) - [c11]Daisuke Suzuki, Koichi Shimizu:
The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes. CHES 2010: 366-382
2000 – 2009
- 2009
- [j7]Minoru Sakairi, Ayako Nishimura, Daisuke Suzuki:
Olfaction Presentation System Using Odor Scanner and Odor-Emitting Apparatus Coupled with Chemical Capsules of Alginic Acid Polymer. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(2): 618-629 (2009) - [c10]Minoru Saeki, Daisuke Suzuki, Koichi Shimizu, Akashi Satoh:
A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques. CHES 2009: 189-204 - [c9]Tsutomu Matsumoto, Hidenobu Mimura, Daisuke Suzuki:
Complementary logics vs masked logics: Which countermeasure is a better selection? ECCTD 2009: 399-402 - [c8]Mie Nakatani, Daisuke Suzuki, Nobuchika Sakata, Shogo Nishida:
A Study of Auditory Warning Signals for the Design Guidelines of Man-Machine Interfaces. HCI (9) 2009: 826-834 - 2008
- [j6]Minoru Saeki, Daisuke Suzuki:
Security Evaluations of MRSL and DRSL Considering Signal Delays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(1): 176-183 (2008) - [j5]Daisuke Suzuki, Minoru Saeki:
An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(1): 184-192 (2008) - [c7]Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
:
High-Speed Search System for PGP Passphrases. CANS 2008: 332-348 - 2007
- [j4]Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa:
Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(1): 160-168 (2007) - [j3]Minoru Saeki, Daisuke Suzuki, Tetsuya Ichikawa:
Leakage Analysis of DPA Countermeasures at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(1): 169-178 (2007) - [j2]Mutsumi Kimura, Shigeki Sawamura, Masakazu Kato, Yuji Hara, Daisuke Suzuki, Hiroyuki Hara, Satoshi Inoue:
Pulse-Width Modulation with Current Uniformization for TFT-OLEDs. IEICE Trans. Electron. 90-C(11): 2076-2082 (2007) - [c6]Daisuke Suzuki:
How to Maximize the Potential of FPGA Resources for Modular Exponentiation. CHES 2007: 272-288 - 2006
- [c5]Akira Utsumi, Daisuke Suzuki:
Word Vectors and Two Kinds of Similarity. ACL 2006 - [c4]Daisuke Suzuki, Minoru Saeki:
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style. CHES 2006: 255-269 - 2005
- [c3]Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa:
DPA Leakage Models for CMOS Logic Circuits. CHES 2005: 366-382 - 2004
- [i1]Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa:
Random Switching Logic: A Countermeasure against DPA based on Transition Probability. IACR Cryptol. ePrint Arch. 2004: 346 (2004) - 2002
- [j1]Akihiko Kandori
, Tsuyoshi Miyashita, Daisuke Suzuki, Koichi Yokosawa, Keiji Tsukada:
Two-dimensional mapping of impedance magnetocardiograms. IEEE Trans. Biomed. Eng. 49(7): 721-728 (2002) - [c2]Kazuhito Ito, Daisuke Suzuki:
A high-level synthesis method for simultaneous placement and scheduling considering data communication delay. APCCAS (1) 2002: 149-154 - 2000
- [c1]Daisuke Suzuki, Tsuyoshi Miyazaki, Koji Yamada, Tsuyoshi Nakamura, Hidenori Itoh:
A Supporting System for Colored Knitting Design. IEA/AIE 2000: 420-425
Coauthor Index

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