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ORCIDHendrik van der Ploeg
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2000 – 2009
- 2009
[j4]Hans Van de Vel, Berry A. J. Buter, Hendrik van der Ploeg, Maarten Vertregt, Govert J. G. M. Geelen, Edward J. F. Paulus:
A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS. IEEE J. Solid State Circuits 44(4): 1047-1056 (2009)- 2006
- [j3]Hendrik van der Ploeg, Maarten Vertregt, Marco Lammers:
A 15-bit 30-MS/s 145-mW three-step ADC for imaging applications. IEEE J. Solid State Circuits 41(7): 1572-1577 (2006) - 2005
- [c2]Hendrik van der Ploeg, Maarten Vertregt, Marco Lammers:
A 15-bit 30 MS/s 145 mW three-step ADC for imaging applications. ESSCIRC 2005: 161-164 - 2003
- [c1]Amir Zjajo, Hendrik van der Ploeg, Maarten Vertregt:
A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS. ESSCIRC 2003: 241-244 - 2001
- [j2]Hendrik van der Ploeg, Gian Hoogzaad, Henk A. H. Termeer, Maarten Vertregt, Raf L. J. Roovers:
A 2.5-V 12-b 54-Msample/s 0.25-μm CMOS ADC in 1-mm2 with mixed-signal chopping and calibration. IEEE J. Solid State Circuits 36(12): 1859-1867 (2001)
1990 – 1999
- 1999
- [j1]Hendrik van der Ploeg, Robert Remmers:
A 3.3-V, 10-b, 25-MSample/s two-step ADC in 0.35-μm CMOS. IEEE J. Solid State Circuits 34(12): 1803-1811 (1999)
Coauthor Index
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