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ORCIDPartha Sharathi Mallick
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Journal Articles
- 2020
[j14]Piratla Uma Sathyakam
, Partha Sharathi Mallick, Paridhi Singh:
Geometry-Based Crosstalk Reduction in CNT Interconnects. J. Circuits Syst. Comput. 29(6): 2050094:1-2050094:14 (2020)- 2019
- [j13]Piratla Uma Sathyakam, Partha Sharathi Mallick, Anmol Ajay Saxena:
High-speed sub-threshold operation of carbon nanotube interconnects. IET Circuits Devices Syst. 13(4): 526-533 (2019) - 2018
- [j12]Rajesh Ramanathan, Partha Sharathi Mallick, Thiruvengadam Sundarajan Jayaraman:
Low Complexity Compressive Sensing Greedy Detection of Generalized Quadrature Spatial Modulation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(3): 632-635 (2018) - [j11]Annasamy Bagubali, V. Prithiviraj, Partha Sharathi Mallick:
Review on IMS-4G-cloud networks maintaining service continuity using distributed multi agent scheme. Int. J. Comput. Aided Eng. Technol. 10(5): 557-567 (2018) - [j10]R. Marimuthu, S. Balamurugan, Partha Sharathi Mallick:
Design of 5-3 multicolumn compressor for high performance multiplier. Int. J. Comput. Aided Eng. Technol. 10(5): 568-575 (2018) - [j9]Rajesh Ramanathan, Velmurugan Periakarupan Gurusamy Sivabalan, Thiruvengadam Sundarajan Jayaraman, Partha Sharathi Mallick:
Spatial modulation and physical layer network coding based bidirectional relay network with transmit antenna selection over Nakagami-m fading channels. Int. J. Commun. Syst. 31(14) (2018) - [j8]Annasamy Bagubali, Tanmay Verma, Anurag Anand, V. Prithiviraj, Partha Sharathi Mallick:
Performance Analysis of Handover Schemes in Heterogeneous Networks. J. Circuits Syst. Comput. 27(11): 1850177:1-1850177:20 (2018) - 2017
- [j7]R. Marimuthu, Y. Elsie Rezinold, Partha Sharathi Mallick:
Design and Analysis of Multiplier Using Approximate 15-4 Compressor. IEEE Access 5: 1027-1036 (2017) - [j6]S. Balamurugan, Partha Sharathi Mallick:
Error Compensation Techniques for Fixed-Width Array Multiplier Design - A Technical Survey. J. Circuits Syst. Comput. 26(3): 1730003:1-1730003:31 (2017) - 2015
- [j5]S. Balaji, R. Santhakumar, Partha Sharathi Mallick:
Enhancing Coverage and Rate of Cell Edge User in Multi-Antenna Poisson Voronoi Cells. J. Circuits Syst. Comput. 24(8): 1550117:1-1550117:30 (2015) - 2014
- [j4]S. Sivanantham, Partha Sharathi Mallick, J. Raja Paul Perinbam:
Low-power selective pattern compression for scan-based test applications. Comput. Electr. Eng. 40(4): 1053-1063 (2014) - [j3]S. Sivanantham, M. Padmavathy, Ganga Gopakumar, Partha Sharathi Mallick, J. Raja Paul Perinbam:
Enhancement of test data compression with multistage encoding. Integr. 47(4): 499-509 (2014) - 2012
- [j2]S. Balamurugan, Sneha Ghosh, Atul, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick:
Design of low power fixed-width multiplier with row bypassing. IEICE Electron. Express 9(20): 1568-1575 (2012) - [j1]Piratla Uma Sathyakam, Partha Sharathi Mallick:
Towards realisation of mixed carbon nanotube bundles as VLSI interconnects: A review. Nano Commun. Networks 3(3): 175-182 (2012)
Conference and Workshop Papers
- 2016
- [c3]Rajesh Ramanathan, Velmurugan Periakarupan Gurusamy Sivabalan, Thiruvengadam Sundarajan Jayaraman, Partha Sharathi Mallick:
Outage performance of bidirectional full duplex AF relay network with joint antenna and relay selection in Nakagami-m fading environment. COMSNETS 2016: 1-2 - 2012
- [c2]S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick:
FPGA design and implementation of truncated multipliers using bypassing technique. ICACCI 2012: 1111-1117 - [c1]S. Sivanantham, K. Sarathkumar, Jincy P. Manuel, Partha Sharathi Mallick, J. Raja Paul Perinbam:
CSP-Filling: A New X-Filling Technique to Reduce Capture and Shift Power in Test Applications. ISED 2012: 135-139
Coauthor Index
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