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"FPGA design and implementation of truncated multipliers using bypassing ..."

S. Balamurugan et al. (2012)

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DOI: 10.1145/2345396.2345574

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick:
FPGA design and implementation of truncated multipliers using bypassing technique. ICACCI 2012: 1111-1117

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