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ORCIDJournal of Circuits, Systems, and Computers, Volume 26
Volume 26, Number 1, January 2017
- Tripurari Sharan, Vijaya Bhadauria
:
Fully Differential, Bulk-Driven, Class AB, Sub-Threshold OTA With Enhanced Slew Rates and Gain. 1750001:1-1750001:25 - Anil Singh, Ayushi Goel, Alpana Agarwal:
A Digital-Based Low-Power Fully Differential Comparator. 1750002:1-1750002:12 - Yun Zhang, Yiqiang Zhao, Peng Dai:
Study of Split Capacitor DAC Mismatch and Calibration in SAR-ADC. 1750003:1-1750003:19 - Ayub Shokrollahi, Babak Mazloom-Nezhad Maybodi:
An Energy-Efficient Clustering Algorithm Using Fuzzy C-Means and Genetic Fuzzy System for Wireless Sensor Network. 1750004:1-1750004:22 - Paulo David Battaglin, Gilmar Barreto:
Kalman Filtering Solution Converges on a Personal Computer. 1750005:1-1750005:17 - Xinsheng Wang, Chenxu Wang, Mingyan Yu:
The Minimum Norm Least-Squares Solution in Reduction by Krylov Subspace Methods. 1750006:1-1750006:18 - Shunji Nakata, Masaki Ono, Masato Sakitani:
An Adiabatic Circuit with Consecutive Changes of the Duty Ratio of the Switching Transistor Using a Microprocessor. 1750007:1-1750007:15 - Pichid Kittisuwan, C. Chinrungrueng:
Differential Form of Bivariate MMSE Estimator Based on Gaussian Noise. 1750008:1-1750008:12 - Xin Li, Jin Sun:
Genetic Algorithm-Based Multi-Objective Optimization for Statistical Yield Analysis Under Parameter Variations. 1750009:1-1750009:21 - Atul Kumar, Bhartendu Chaturvedi:
Novel CMOS Current Inverting Differential Input Transconductance Amplifier and Its Application. 1750010:1-1750010:16 - Tuba Nur Gul, Ali Kircay:
The Design of Fifth-Order Butterworth Lowpass Log-Domain Filter for Bluetooth/Wi-Fi Receiver Using Signal Flow Graph Method. 1750011:1-1750011:17 - Farzad Mohammadzadeh Shahir, Ebrahim Babaei, Murtaza Farsadi:
A New Structure for Nonisolated Boost DC-DC Converter. 1750012:1-1750012:26 - Mehmet Sagbas, Umut Engin Ayten, Herman Sedef, Shahram Minaei:
Modified Gorski-Popiel Technique and Synthetic Floating Transformer Circuit Using Minimum Components. 1750013:1-1750013:21 - M. C. Parameshwara, H. C. Srinivasaiah:
Low-Power Hybrid 1-Bit Full-Adder Circuit for Energy Efficient Arithmetic Applications. 1750014:1-1750014:15 - Ismail Koyuncu, Ibrahim Sahin, Clay Gloster, Namik Kemal Saritekin:
A Neuron Library for Rapid Realization of Artificial Neural Networks on FPGA: A Case Study of Rössler Chaotic System. 1750015:1-1750015:21 - Junlong Zhou, Min Yin, Zhifang Li, Kun Cao, Jianming Yan, Tongquan Wei, Mingsong Chen, Xin Fu:
Fault-Tolerant Task Scheduling for Mixed-Criticality Real-Time Systems. 1750016:1-1750016:17 - Zeshi Yuan, Hongtao Li, Xiaohua Zhu:
A Useful Chaotic Family with Single Linearity and Circuit Implementation Based on FPGA. 1750017:1-1750017:21 - Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun:
Automatic Design and Yield Enhancement of Data Converters. 1750018:1-1750018:19
Volume 26, Number 2, February 2017
- Nesrine Toubaline, Djamel Bennouar, Ali Mahdoum:
A Classification and Evaluation Framework for NoC Mapping Strategies. 1730001:1-1730001:44
- Nazar Abbas Saqib, Muhammad Zia, Hasan Mahmood, Muazzam Ali Khan:
On Generating High-Quality Random Numbers. 1750019:1-1750019:21 - T. R. Rajalakshmi, R. Sudhakar:
Impact of Single Event Upset on Voltage and Current Behaviors of CNTFET SRAM and a Comparison with CMOS SRAM. 1750020:1-1750020:14 - Ateeq-Ur-Rehman Shaheen, Fawnizu Azmadi Hussin, Nor Hisham Hamid:
A Hybrid Delay Design-for-Testability for Nonseparable RTL Controller-Data Path Circuits. 1750021:1-1750021:26 - Siyuan Xu, Han Zhuang, Xin Fu, Junlong Zhou, Mingsong Chen:
GPU-Based Fluid Motion Estimation Using Energy Constraint. 1750022:1-1750022:20 - Minoh Son, Changkun Park:
Cell-Based ESD Diodes with a Zigzag-Shaped Layout to Enhance the ESD Survival Level. 1750023:1-1750023:9 - Godpromesse Kenné, Clotaire Thierry Sanjong, Eustace Mbaka Nfah:
Adaptive PI Control Strategy for a Self-Excited Induction Generator Driven by a Variable Speed Wind Turbine. 1750024:1-1750024:36 - Erkan Yüce:
DO-CCII/DO-DVCC Based Electronically Fine Tunable Quadrature Oscillators. 1750025:1-1750025:17 - Mehmet Serhat Odabas, Nurettin Senyer, Gökhan Kayhan, Erhan Ergun:
Estimation of Chlorophyll Concentration Index at Leaves using Artificial Neural Networks. 1750026:1-1750026:13 - Chia-Hung Chang, Cihun-Siyong Alex Gong, Jian-Chiun Liou, Yu-Lin Tsou, Feng-Lin Shiu, Hwann-Kaeo Chiou, Po-Hsun Tu:
A 260-μW Down-Conversion Demodulator for MICS-Band Receiver. 1750027:1-1750027:10 - Cheng-Hung Lin, Tzu-Hsuan Huang, Shu-Yen Lin, Yu-Hsuan Lee:
Design and Implementation of Operation-Reduced LDPC Decoder Based on a Check Node Stopping Scheme. 1750028:1-1750028:19 - Zehra Gulru Cam, Herman Sedef:
A New Floating Memristance Simulator Circuit Based on Second Generation Current Conveyor. 1750029:1-1750029:15 - Pankaj Kumar, Rajender Kumar Sharma:
Low-Power and Area-Efficient Parallel Multiplier Design Using Two-Dimensional Bypassing. 1750030:1-1750030:18 - Ireneusz Mrozek, Vyacheslav N. Yarmolik:
Two-Run RAM March Testing with Address Decimation. 1750031:1-1750031:17 - Hechmi Ben Azza, Mongi Moujahed, Mohamed Jemli, Mohamed Boussak:
Implementation of Improved Sliding Mode Observer and Fault Tolerant Control for a PMSM Drive. 1750032:1-1750032:16 - Tian-Bo Deng:
Stability-Guaranteed Two-Phase Design of Odd-Order Variable-Magnitude Digital Filters. 1750033:1-1750033:13 - J. Sangeetha, P. Renuga:
Recurrent ANFIS-Coordinated Controller Design for Multimachine Power System with FACTS Devices. 1750034:1-1750034:14 - Stefan Leitner, Haibo Wang, Spyros Tragoudas:
Design Techniques for Direct Digital Synthesis Circuits with Improved Frequency Accuracy Over Wide Frequency Ranges. 1750035:1-1750035:21
Volume 26, Number 3, March 2017
- A. Karthikeyan, P. S. Mallick:
Optimization Techniques for CNT Based VLSI Interconnects - A Review. 1730002:1-1730002:15 - S. Balamurugan, Partha Sharathi Mallick:
Error Compensation Techniques for Fixed-Width Array Multiplier Design - A Technical Survey. 1730003:1-1730003:31
- Mousumi Bhanja, Baidyanath Ray:
Design of Configurable gm-C Biquadratic Filter. 1750036:1-1750036:19 - Xiaofeng Zhou, Lu Liu, Zhangming Zhu:
A Fault-Tolerant Deflection Routing for Network-on-Chip. 1750037:1-1750037:19 - V. P. Singh, Dharma Pal Singh Chauhan, Sugandh P. Singh, Tapan Prakash:
On Time Moments and Markov Parameters of Continuous Interval Systems. 1750038:1-1750038:7 - Xinghua Yang, Yue Xing, Fei Qiao, Huazhong Yang:
Multistage Latency Adders Architecture Employing Approximate Computing. 1750039:1-1750039:18 - Arun Kumar Sinha:
A Self-Starting 70 mV-1 V, 65% Peak Efficient, TEG Energy Harvesting Chip with 5 ms Startup Time. 1750040:1-1750040:22 - Abhishek Nag, Debanjali Nath, Sambhu Nath Pradhan:
Leakage Reduction of SRAM-Based Look-Up Table Using Dynamic Power Gating. 1750041:1-1750041:12 - Hassan A. Salamy, Semih Aslan:
Pipelined-Scheduling of Multiple Embedded Applications on a Multi-Processor-SoC. 1750042:1-1750042:22 - Ching-Han Chen, Ming-Yi Lin, Wen-Hung Lin:
Designing and Implementing a Lightweight WSN MAC Protocol for Smart Home Networking Applications. 1750043:1-1750043:20 - Hirak Kumar Maity, Santi P. Maity:
FPGA Implementation for Modified RCM-RW on Digital Images. 1750044:1-1750044:25 - Renato J. Cintra, Fábio M. Bayer, Arjuna Madanayake, Uma Sadhvi Potluri, Amila Edirisuriya:
Fast Algorithms and Architectures for 8-Point DST-II/DST-VII Approximations. 1750045:1-1750045:11 - Prachi Palsodkar, Pravin Dakhole, Prasanna Palsodkar:
Reduced Complexity Linearity Improved Threshold Quantized Comparator Based Flash ADC. 1750046:1-1750046:19 - Yiqiang Zhao, Jingshuai Wang, Yun Sheng:
A Mixed Signal DC Offset Cancellation for VGA of Zero-IF Receiver. 1750047:1-1750047:9 - Vida Orduee Niar, Gholamreza Zareh Fatin:
A Low Power Low-Pass Fourth-Order Filter for WiMAX/LTE Receiver in CMOS 45nm Technology. 1750048:1-1750048:15 - Saber Krim, Soufien Gdaim, Abdellatif Mtibaa, Mohamed Faouzi Mimouni:
Implementation on the FPGA of DTC-SVM Based Proportional Integral and Sliding Mode Controllers of an Induction Motor: A Comparative Study. 1750049:1-1750049:32 - Jan Jerabek, Roman Sotner, Josef Polak, Lukas Langhammer, Norbert Herencsar, Roman Prokop, Kamil Vrba:
Resistor-Less Single-Purpose or Reconfigurable Biquads Utilizing Single z-Copy Controlled-Gain Voltage Differencing Current Conveyor. 1750050:1-1750050:21 - Lakhindar Murmu, Sushrut Das:
A Dual-Band Bandpass Filter Using Quad-Mode Resonator for Bluetooth and WLAN Applications. 1750051:1-1750051:11
Volume 26, Number 4, April 2017
- Erkan Yüce, Shahram Minaei:
Commercially Available Active Device Based Grounded Inductor Simulator and Universal Filter with Improved Low Frequency Performances. 1750052:1-1750052:14 - Burhan Khurshid, Roohie Naaz Mir:
Efficient Realization of Fixed-Point Binary and Ternary Adders on FPGAs. 1750053:1-1750053:29 - M. Kiruba, V. Sumathy:
A Novel HBE-MCM-Based Multiplier Architecture for 8-Point DCT Structure. 1750054:1-1750054:22 - Aymen Ben Hammadi, Mongia Mhiri, Fayrouz Haddad, Sehmi Saad, Kamel Besbes:
An Enhanced Design of Multi-Band RF Band Pass Filter Based on Tunable High-Q Active Inductor for Nano-Satellite Applications. 1750055:1-1750055:20 - Chao Tong, Yu Lian, Yang Zhang, Zhongyu Xie, Xiang Long, Jianwei Niu:
A Novel Real-Time Fall Detection System Based on Real-Time Video and Mobile Phones. 1750056:1-1750056:26 - K. Muthulakshmi, R. M. Sasiraja, V. Suresh Kumar:
The Proper Location and Sizing of Multiple Distributed Generators for Maximizing Voltage Stability Using PSO. 1750057:1-1750057:20 - Uzma Mushtaq, Osman Hasan, Falah R. Awwad:
NoC-Based Implementation of Free Form Deformations in Medical Imaging Registration. 1750058:1-1750058:13 - Yiming Ouyang, Jian Da, Xiumin Wang, Qianqian Han, Huaguo Liang, Gaoming Du:
A TSV Fault-Tolerant Scheme Based on Failure Classification in 3D-NoC. 1750059:1-1750059:19 - Chengyao Lv, Huihua Liu, Yuanxing Dong, Fangyuan Li, Yuan Liang:
Using Uniform-Design GEP for Part-of-Speech Tagging. 1750060:1-1750060:14 - G. Thippa Reddy, Neelu Khare:
An Efficient System for Heart Disease Prediction Using Hybrid OFBAT with Rule-Based Fuzzy Logic Model. 1750061:1-1750061:21 - Alessandra Pipino, Marcello De Matteis, Karen Wan, Andrea Baschirotto:
A Simple Algorithm for Specs Definition in Wireless Receivers. 1750062:1-1750062:19 - Lianxi Liu, Yiyang Zhou, Junchao Mu, Xufeng Liao, Zhangming Zhu, Yintang Yang:
A Near-Threshold Voltage Startup Monolithic Boost Converter with Adaptive Sleeping Time Control. 1750063:1-1750063:19 - Shyamapada Mukherjee, Suchismita Roy:
Via-Aware Dogleg Routing Using Boolean Satisfiability. 1750064:1-1750064:24 - Yinshan Liang, Jiangling Lu:
Direct Low Order Rational Approximations for Fractional Order Systems in Narrow Frequency Band: A Fix-Pole Method. 1750065:1-1750065:15 - Lamiche Chaabane, Abdelouahab Moussaoui:
Aligning Multiple Sequences Using an Improved Tabu Search Algorithm. 1750066:1-1750066:13 - Naser Khatti, Massoud Dousti:
A Low Phase Noise LC Quadrature VCO Using Impulse Shaping Based on Gaussian Pulse Generator. 1750067:1-1750067:13 - Jaspal Singh Khinda, Malay Ranjan Tripathy, Deepak Gambhir:
Multi-Edged Wide-Band Rectangular Microstrip Fractal Antenna Array for C- and X-Band Wireless Applications. 1750068:1-1750068:25 - Sergio Saponara, Filippo Giannetti, Bruno Neri:
Design Exploration of mm-Wave Integrated Transceivers for Short-Range Mobile Communications Towards 5G. 1750069:1-1750069:27
Volume 26, Number 5, May 2017
- Metin Sengül:
Broadband Matching via Unequal Length Cascaded Transmission Lines. 1750070:1-1750070:12 - Kamil Zeberga, Rize Jin, Hyung-Ju Cho, Tae-Sun Chung:
A Safe-Region Approach to a Moving k-RNN Queries in a Directed Road Network. 1750071:1-1750071:18 - Min-Shiang Hwang, Tsuei-Hung Sun, Cheng-Chi Lee:
Achieving Dynamic Data Guarantee and Data Confidentiality of Public Auditing in Cloud Storage Service. 1750072:1-1750072:16 - Abdullah El-Bayoumi, Hassan Mostafa, Ahmed M. Soliman:
A Novel MIM-Capacitor-Based 1-GS/s 14-bit Variation-Tolerant Fully-Differential Voltage-to-Time Converter (VTC) Circuit. 1750073:1-1750073:35 - Hassan Fathabadi:
Comparative Study Between Two Novel BJT-DVCC and CMOS-DVCC. 1750074:1-1750074:10 - Najam Muhammad Amin, Lianfeng Shen, Zhigong Wang, Muhammad Ovais Akhter, Muhammad Tariq Afridi:
60 GHz-Band Low-Noise Amplifier. 1750075:1-1750075:17 - Noura Ben Ameur:
A Low-Phase Noise ADPLL Based on a PRBS-Dithered DDS Enhancement Circuit. 1750076:1-1750076:13 - Anush Bekal, Shabi Tabassum, Manish Goswami:
Low Power Design of a 1 V 8-bit 125 fJ Asynchronous SAR ADC with Binary Weighted Capacitive DAC. 1750077:1-1750077:25 - E. V. V. Cambero, C. E. Capovilla, Ivan Roberto Santana Casella, R. R. Munoz, H. X. Araujo:
A CMOS LNA Partially Degenerated Topology Proposal Using Active Inductors. 1750078:1-1750078:15 - Saroja S. Bhusare, V. S. Kanchana Bhaaskaran:
Low-Power High-Accuracy Fixed-Width Radix-8 Booth Multiplier Using Probabilistic Estimation Technique. 1750079:1-1750079:12 - Nadia Gargouri, Dalenda Ben Issa, Zied Sakka, Abdennaceur Kachouri, Mounir Samet:
Design and Optimization of Differential Ring Oscillator for IR-UWB Applications in 0.18 μm CMOS Technology. 1750080:1-1750080:15 - Adam Milik, Edward Hrynkiewicz:
Nonlinearity Measurement of a Voltage Ramp Using a Digital Technique. 1750081:1-1750081:15 - Yavar Safaei Mehrabani, Reza Faghih Mirzaee, Zahra Zareei, Seyedeh Mohtaram Daryabari:
A Novel High-Speed, Low-Power CNTFET-Based Inexact Full Adder Cell for Image Processing Application of Motion Detector. 1750082:1-1750082:15 - Yuen-Haw Chang, Chun-Hung Wang:
Design and Analysis of AMSCC for Piezoelectric Energy Harvesting. 1750083:1-1750083:21 - Pankaj Kumar, Rajender Kumar Sharma:
An Energy Efficient Logic Approach to Implement CMOS Full Adder. 1750084:1-1750084:20 - Nasser Erfani Majd, Hassan Ghafoori Fard, Abbas Mohammadi:
Coding Efficiency and Bandwidth Enhancement in Polar Delta-Sigma Modulator Transmitter Using Quantization Noise Reduction and Parallel Processing Techniques. 1750085:1-1750085:23 - Boris Ryabko, Anton Rakitskiy:
An Analytic Method for Estimating the Computation Capacity of Computing Devices. 1750086:1-1750086:13 - Igor Lemberski:
Asynchronous Logic Implementation Based on Factorized DIMS. 1750087:1-1750087:9
Volume 26, Number 6, June 2017
- Yong-An Li:
Systematic Synthesis of High-Q T-T Filters Employing CCCIIs. 1750088:1-1750088:8 - R. Velmurugan, K. Mahadevan:
A Novel RRR-SVPWM-Based Speed Controlling Mechanism for Brushless DC Motor. 1750089:1-1750089:24 - B. R. Lin:
ZVS Converter with Full-Bridge and Half-Bridge Circuits: Analysis, Design and Implementation. 1750090:1-1750090:13 - Linwei Niu, Wei Li:
Energy-Efficient Scheduling for Embedded Real-Time Systems Using Threshold Work-Demand Analysis. 1750091:1-1750091:36 - J. N. Chandra Sekhar, G. V. Marutheswar:
Direct Torque Control of Induction Motor Using Enhanced Firefly Algorithm - ANFIS. 1750092:1-1750092:22 - Sudhanshu Maheshwari, Deepak Agrawal:
Cascadable and Tunable Analog Building Blocks Using EX-CCCII. 1750093:1-1750093:16 - Phatsagul Thitimahatthanagusol, Charinsak Saetiaw, Thanaset Thosdeekoraphat, Chanchai Thongsopa, Saksit Summart:
CCCIIs-Based First-Order All-Pass Filter and Quadrature Oscillators. 1750094:1-1750094:18 - Vigneswaran Narayanamurthy, Sujatha Lakshminarayanan, Mohamed Yacin Sikkandar, Fahmi Samsuri:
Design Optimization and Analysis of Proof Mass Actuation for MEMS Accelerometer: A Simulation Study. 1750095:1-1750095:10 - Amit Bage, Sushrut Das:
Compact Triple-Band Waveguide Bandpass Filter Using Concentric Multiple Complementary Split Ring Resonators. 1750096:1-1750096:12 - Alexandru Amaricai, Ovidiu Sicoe, Oana Boncalo:
On the Redundant Representation of Partial Remainders in Radix-4 SRT Dividers. 1750097:1-1750097:13 - Mustafa Konal, Firat Kaçar:
MOS Only Grounded Active Inductor Circuits and Their Filter Applications. 1750098:1-1750098:17 - Hamid Reza Baghaee, Mojtaba Mirsalim, Gevork B. Gharehpetian, Heidar Ali Talebi:
Eigenvalue, Robustness and Time Delay Analysis of Hierarchical Control Scheme in Multi-DER Microgrid to Enhance Small/Large-Signal Stability Using Complementary Loop and Fuzzy Logic Controller. 1750099:1-1750099:34 - Rohith Krishnan Pilla, S. Krishnakumar:
An Approach Towards Design of Analog Integrated Circuits Based on Fixator-Norator Pair. 1750100:1-1750100:19 - Mohammad Rahimi, Behrad Soleymani, Farrokh Aminifar, Amin Gholami:
A New Methodology for Circuit Analysis with Reverse Analysis Capability. 1750101:1-1750101:24 - Manodipan Sahoo, Hafizur Rahaman:
Analysis of Crosstalk-Induced Effects in Multilayer Graphene Nanoribbon Interconnects. 1750102:1-1750102:21 - Pankaj Garg, Singara Singh Kasana, Geeta Kasana:
Block-Based Reversible Data Hiding Using Histogram Shifting and Modulus Operator for Digital Images. 1750103:1-1750103:17 - Ramya Vijay, T. Rama Rao, Revathi Venkataraman:
Concurrent Multi-Band Low-Noise Amplifier. 1750104:1-1750104:11 - Ebrahim Babaei, Zahra Saadatizadeh, Behnam Mohammadi-Ivatloo:
A New Interleaved Bidirectional Zero Voltage Switching DC/DC Converter with High Conversion Ratio. 1750105:1-1750105:25
Volume 26, Number 7, July 2017
- Muhanad Almawlawe, Darko Mitic, Dragan Antic, Zoran Icic:
An Approach to Microcontroller-Based Realization of Boost Converter with Quasi-Sliding Mode Control. 1750106:1-1750106:16 - Raahat Devender Singh, Naveen Aggarwal:
Optical Flow and Prediction Residual Based Hybrid Forensic System for Inter-Frame Tampering Detection. 1750107:1-1750107:37 - Yuzhuo Pan, Chen Lv, Shanhe Su, Jincan Chen:
Intelligent Control Circuit Integral with Pattern Recognition Techniques for High-Pressure Sodium Lamps. 1750108:1-1750108:15 - Dongmei Zhang, Jianping Liao, Xiaohui Huang, Jiaqi Jin:
A Multifractal-Guided Multilevel Surrogate Model-Based Evolutionary Algorithm for Expensive Multiobjective Problems. 1750109:1-1750109:18 - Md. Haidar Sharif:
An Eigenvalue Approach to Detect Flows and Events in Crowd Videos. 1750110:1-1750110:50 - Jie Wang, Jiwei Liu:
Fault-Tolerant Strategy for Real-Time System Based on Evolvable Hardware. 1750111:1-1750111:18 - Surachoke Thanapitak, Prajuab Pawarangkoon, Chutham Sawigun:
A Flipped Voltage Follower Second-Order Bandpass Filter. 1750112:1-1750112:10 - Jingru Sun, Pan Huang, Yichuang Sun:
A New Technique for the Design of Multi-Phase Voltage Controlled Oscillators. 1750113:1-1750113:13