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Books and Theses
- 2016
[b1]Hao Yu, Leibin Ni
, Yuhao Wang:
Non-Volatile In-Memory Computing by Spintronics. Synthesis Lectures on Emerging Engineering Technologies, Morgan & Claypool Publishers 2016, ISBN 978-3-031-00904-4, pp. 1-161
Journal Articles
- 2024
- [j5]Laimin Du, Leibin Ni, Xiong Liu, Guanqi Peng, Kai Li, Wei Mao, Hao Yu:
A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier. IEEE Open J. Circuits Syst. 5: 57-68 (2024) - 2022
- [j4]Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian:
VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5085-5099 (2022) - 2017
- [j3]Leibin Ni, Hantao Huang, Zichuan Liu, Rajiv V. Joshi, Hao Yu:
Distributed In-Memory Computing on Binary RRAM Crossbar. ACM J. Emerg. Technol. Comput. Syst. 13(3): 36:1-36:18 (2017) - 2016
- [j2]Leibin Ni, Sai Manoj P. D., Yang Song, Chenjie Gu, Hao Yu:
A Zonotoped Macromodeling for Eye-Diagram Verification of High-Speed I/O Links With Jitter and Parameter Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(6): 1040-1051 (2016) - [j1]Yuhao Wang, Leibin Ni, Chip-Hong Chang, Hao Yu:
DW-AES: A Domain-Wall Nanowire-Based AES for High Throughput and Energy-Efficient Data Encryption in Non-Volatile Memory. IEEE Trans. Inf. Forensics Secur. 11(11): 2426-2440 (2016)
Conference and Workshop Papers
- 2024
- [c17]Haobo Liu, Zhengyang Qian, Wei Wu, Hongwei Ren, Zhiwei Liu, Leibin Ni:
AFPR-CIM: An Analog-Domain Floating-Point RRAM -based Compute- In- Memory Architecture with Dynamic Range Adaptive FP-ADC. DATE 2024: 1-6 - 2023
- [c16]Xingyue Qian, Chang Meng, Xiaolong Shen, Junfeng Zhao, Leibin Ni, Weikang Qian:
High-accuracy Low-power Reconfigurable Architectures for Decomposition-based Approximate Lookup Table. DATE 2023: 1-6 - 2022
- [c15]Laimin Du, Leibin Ni, Xiong Liu, Wei Mao, Hao Yu:
A Low-Power Approximate Multiplier with Sign-Focus Compressor and Error Compensation. APCCAS 2022: 226-230 - [c14]Chang Meng, Xuan Wang, Jiajun Sun, Sijun Tao, Wei Wu, Zhihang Wu, Leibin Ni, Xiaolong Shen, Junfeng Zhao, Weikang Qian:
SEALS: sensitivity-driven efficient approximate logic synthesis. DAC 2022: 439-444 - [c13]Jan Lappas, André Lucas Chinazzo, Christian Weis, Chenyang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn:
Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE 2022: 1083-1084 - [c12]Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori:
Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS 2022: 1-4 - [c11]André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn:
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 2022: 1-4 - 2019
- [c10]Yuan Cheng, Ngai Wong, Xiong Liu, Leibin Ni, Hai-Bao Chen, Hao Yu:
A Low-Power High-Throughput In-Memory CMOS-ReRAM Accelerator for Large-Scale Deep Residual Neural Networks. ASICON 2019: 1-4 - 2017
- [c9]Leibin Ni, Zichuan Liu, Wenhao Song, J. Joshua Yang, Hao Yu, Kanwen Wang, Yuangang Wang:
An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar. ISLPED 2017: 1-6 - [c8]Hantao Huang, Leibin Ni, Hao Yu:
LTNN: An energy-efficient machine learning accelerator on 3D CMOS-RRAM for layer-wise tensorized neural network. SoCC 2017: 280-285 - 2016
- [c7]Hantao Huang, Leibin Ni, Yuhao Wang, Hao Yu, Zongwei Wang, Yimao Cai, Ru Huang:
A 3D multi-layer CMOS-RRAM accelerator for neural network. 3DIC 2016: 1-5 - [c6]Leibin Ni, Yuhao Wang, Hao Yu, Wei Yang, Chuliang Weng, Junfeng Zhao:
An energy-efficient matrix multiplication accelerator by distributed in-memory computing on binary RRAM crossbar. ASP-DAC 2016: 280-285 - [c5]Leibin Ni, Hantao Huang, Hao Yu:
On-line machine learning accelerator on digital RRAM-crossbar. ISCAS 2016: 113-116 - [c4]Leibin Ni, Hantao Huang, Hao Yu:
A memristor network with coupled oscillator and crossbar towards L2-norm based machine learning. NANOARCH 2016: 179-184 - [c3]Suman Deb, Leibin Ni, Hao Yu, Anupam Chattopadhyay:
Racetrack memory-based encoder/decoder for low-power interconnect architectures. SAMOS 2016: 281-287 - 2015
- [c2]Yuhao Wang, Hantao Huang, Leibin Ni, Hao Yu, Mei Yan, Chuliang Weng, Wei Yang, Junfeng Zhao:
An energy-efficient non-volatile in-memory accelerator for sparse-representation based face recognition. DATE 2015: 932-935 - [c1]Yuhao Wang, Xin Li, Hao Yu, Leibin Ni, Wei Yang, Chuliang Weng, Junfeng Zhao:
Optimizing Boolean embedding matrix for compressive sensing in RRAM crossbar. ISLPED 2015: 13-18
Informal and Other Publications
- 2024
- [i1]Haobo Liu, Zhengyang Qian, Wei Wu, Hongwei Ren, Zhiwei Liu, Leibin Ni:
AFPR-CIM: An Analog-Domain Floating-Point RRAM-based Compute-In-Memory Architecture with Dynamic Range Adaptive FP-ADC. CoRR abs/2402.13798 (2024)
Coauthor Index
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