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2010 – 2019
- 2018
[c7]Wei-Chung Chen, Tzu-Chi Huang, Chao-Chang Chiu, Chih-Wei Chang, Kuo-Chun Hsu:
94% power-recycle and near-zero driving-dead-zone N-type low-dropout regulator with 20mV undershoot at short-period load transient of flash memory in smart phone. ISSCC 2018: 436-438- 2017
- [j7]Shang-Hsien Yang, Tsung-Hsun Tsai, Hsin Chen, Chao-Chang Chiu, Ke-Horng Chen
, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai:
High Accuracy Knee Voltage Detection for Primary-Side Control in Flyback Battery Charger. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(4): 1003-1012 (2017) - 2016
- [j6]Shang-Hsien Yang, Che-Hao Meng, Chao-Chang Chiu, Chih-Wei Chang, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A Buck Power Factor Correction Converter with Predictive Quadratic Sinusoidal Current Modulation and Line Voltage Reconstruction. IEEE Trans. Ind. Electron. 63(9): 5912-5920 (2016) - 2015
- [j5]Chao-Chang Chiu, Po-Hsien Huang, Moris Lin, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chao-Cheng Lee:
A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 59-69 (2015) - [c6]Hsiang-An Yang, Chao-Chang Chiu, Shin-Chi Lai, Jui-Lung Chen, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo:
120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. ESSCIRC 2015: 291-294 - 2014
- [j4]Chao-Chang Chiu, Moris Lin, Chih-Wei Chang, Che-Hao Meng, Hsiang-An Yang, Ke-Horng Chen:
Self-Calibrated Knee Voltage Detector With 99.65% High Accuracy for AC Charger System in 0.5 µm 500 V UHV Process. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 2786-2795 (2014) - [c5]Chao-Chang Chiu, Hsiang-An Yang, Yi-Ping Su, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen:
A compact power management for next generation intensive care unit with 91% conversion efficiency. ICCE-TW 2014: 161-162 - 2013
- [j3]Yu-Huei Lee, Shen-Yu Peng, Chao-Chang Chiu, Alex Chun-Hsien Wu, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee:
A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. IEEE J. Solid State Circuits 48(4): 1018-1030 (2013) - [j2]Shen-Yu Peng, Tzu-Chi Huang, Yu-Huei Lee, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Tsung-Yen Tsai, Chen-Chih Huang, Long-Der Chen, Cheng-Chen Yang:
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. IEEE J. Solid State Circuits 48(11): 2649-2661 (2013) - [c4]Moris Lin, Yung-Sheng Huang, Andreas Ehrhart, Yu-Huei Lee, Chao-Chang Chiu, Bernhard Wicht, Ke-Horng Chen:
Authentic mode-toggled detector with fast transient response under wide load range buck-boost converter. ISCAS 2013: 2952-2955 - 2012
- [j1]Yu-Huei Lee, Chao-Chang Chiu, Shen-Yu Peng, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Chen-Chih Huang, Tsung-Yen Tsai:
A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. IEEE J. Solid State Circuits 47(11): 2563-2575 (2012) - [c3]Yu-Huei Lee, Tzu-Chi Huang, Kuan-Yu Chu, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee:
A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS. ESSCIRC 2012: 161-164 - [c2]Yu-Huei Lee, Shen-Yu Peng, Alex Chun-Hsien Wu, Chao-Chang Chiu, Yao-Yi Yang, Ming-Hsin Huang, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee:
A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. VLSIC 2012: 178-179 - 2011
- [c1]Yu-Huei Lee, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Chen-Chih Huang:
On-the-fly dynamic voltage scaling (DVS) in 65nm energy-efficient power management with frequency-based control (FBC) for SoC system. A-SSCC 2011: 329-332
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