![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
"A 50nA quiescent current asynchronous digital-LDO with PLL-modulated ..."
Yu-Huei Lee et al. (2012)
- Yu-Huei Lee, Shen-Yu Peng, Alex Chun-Hsien Wu, Chao-Chang Chiu, Yao-Yi Yang, Ming-Hsin Huang, Ke-Horng Chen
, Ying-Hsi Lin, Shih-Wei Wang, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee:
A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. VLSIC 2012: 178-179
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.