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Felice Crupi
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Publications
- 2023
- [j39]Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V. IEEE Access 11: 3584-3596 (2023) - 2021
- [j32]Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
Trimming-Less Voltage Reference for Highly Uncertain Harvesting Down to 0.25 V, 5.4 pW. IEEE J. Solid State Circuits 56(10): 3134-3144 (2021) - [j31]Luigi Fassio, Francesco Settino, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1393-1397 (2021) - [j30]Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
A 0.6-to-1.8V CMOS Current Reference With Near-100% Power Utilization. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3038-3042 (2021) - [c21]Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy. ESSCIRC 2021: 343-346 - 2020
- [c19]Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto:
A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2, 200-μm2 Area in 180nm. VLSI Circuits 2020: 1-2 - 2019
- [c15]Marco Lanuzza, Raffaele De Rose, Felice Crupi, Massimo Alioto:
An Energy Aware Variation-Tolerant Writing Termination Control for STT-based Non Volatile Flip-Flops. ICECS 2019: 158-161 - 2018
- [j27]Raffaele De Rose, Marco Lanuzza, Felice Crupi, Giulio Siracusano, Riccardo Tomasello, Giovanni Finocchio, Mario Carpentieri, Massimo Alioto:
A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(3): 1086-1095 (2018) - 2017
- [c9]Raffaele De Rose, Marco Lanuzza, Felice Crupi, Giulio Siracusano, Riccardo Tomasello, Giovanni Finocchio, Mario Carpentieri, Massimo Alioto:
A variation-aware simulation framework for hybrid CMOS/spintronic circuits. ISCAS 2017: 1-4 - 2012
- [j16]Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Mitsuhiro Togo, N. Horiguchi, Guido Groeseneken:
Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements. IEEE Trans. Circuits Syst. II Express Briefs 59-II(7): 439-442 (2012) - [j15]Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jérôme Mitard, Liesbeth Witters, Thomas Y. Hoffmann:
Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1487-1495 (2012) - 2011
- [j13]Paolo Magnone, Felice Crupi, Massimo Alioto, Ben Kaczer, Brice De Jaeger:
Understanding the Potential and the Limits of Germanium pMOSFETs for VLSI Circuits From Experimental Measurements. IEEE Trans. Very Large Scale Integr. Syst. 19(9): 1569-1582 (2011) - [c2]Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jérôme Mitard, Liesbeth Witters, Thomas Y. Hoffmann:
Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling. ISCAS 2011: 2249-2252 - 2010
- [c1]Paolo Magnone, Felice Crupi, Massimo Alioto, Ben Kaczer:
Experimental study of leakage-delay trade-off in Germanium pMOSFETs for logic circuits. ISCAS 2010: 1699-1702
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