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Gustavo Liñán Cembrano
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2020 – today
- 2024
- [j13]Pablo Díaz-Lobo, Gustavo Liñán Cembrano, José M. de la Rosa:
On the Use of Artificial Neural Networks for the Automated High-Level Design of ΣΔ Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 71(5): 2006-2016 (2024) - [j12]Gustavo Liñán Cembrano, Nuno Lourenço, Nuno Horta, José M. de la Rosa:
Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks - A Tutorial Brief. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1677-1682 (2024) - [c21]Gustavo Liñán Cembrano, José M. de la Rosa:
Live Demonstration: Automated Design of Analog and Mixed-Signal Circuits Using Neural Networks. ISCAS 2024: 1 - [c20]Gustavo Liñán Cembrano, José M. de la Rosa:
Live Demonstration: Using ANNs to Predict the Evolution of Spectrum Occupancy. ISCAS 2024: 1 - [c19]A. Rojas, Gustavo Liñán Cembrano, Gordana Jovanovic-Dolecek, José M. de la Rosa:
Deep Learning-Based Architecture for RF Frame Detection for CR Applications Using Spectrograms. MWSCAS 2024: 122-125
2010 – 2019
- 2015
- [c18]Sonia Vargas-Sierra, Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez:
Live demonstration: Real-time high dynamic range video acquisition using in-pixel adaptive content-aware tone mapping compression. ISCAS 2015: 1900 - 2013
- [j11]Ricardo Carmona-Galán, Ákos Zarándy, Csaba Rekeczky, Péter Földesy, Alberto Rodríguez-Pérez, Carlos M. Domínguez-Matas, Jorge Fernández-Berni, Gustavo Liñán Cembrano, Maria Belen Pérez-Verdú, Zoltán Kárász, Manuel Suárez-Cambre, Víctor Manuel Brea Sánchez, Tamás Roska, Ángel Rodríguez-Vázquez:
A hierarchical vision processing architecture oriented to 3D integration of smart camera chips. J. Syst. Archit. 59(10-A): 908-919 (2013) - 2012
- [j10]Manuel Suarez, Víctor M. Brea, Jorge Fernández-Berni, Ricardo Carmona-Galán, Gustavo Liñán, Diego Cabello, Ángel Rodríguez-Vázquez:
CMOS-3D Smart Imager Architectures for Feature Detection. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(4): 723-736 (2012) - [c17]Sonia Vargas-Sierra, Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez:
A 176×144 148dB adaptive tone-mapping imager. Sensors, Cameras, and Systems for Industrial and Scientific Applications 2012: 82980A - [c16]Sonia Vargas-Sierra, Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez:
Control and acquisition system for a High Dynamic Range CMOS Image Sensor. ICECS 2012: 586-589 - [c15]Sonia Vargas-Sierra, Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez:
A 148dB focal-plane tone-mapping QCIF imager. ISCAS 2012: 1616-1619 - 2011
- [c14]Jorge Fernández-Berni, Ricardo Carmona-Galán, Gustavo Liñán Cembrano, Ákos Zarándy, Ángel Rodríguez-Vázquez:
Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor. ICDSC 2011: 1-6 - [c13]Jorge Fernández-Berni, Ricardo Carmona-Galán, Gustavo Liñán Cembrano, Ákos Zarándy, Ángel Rodríguez-Vázquez:
Demo: Real-time remote reporting of active regions with Wi-FLIP. ICDSC 2011: 1-2 - 2010
- [c12]Manuel Suarez, Víctor M. Brea, Carlos M. Domínguez-Matas, Ricardo Carmona, Gustavo Liñán, Ángel Rodríguez-Vázquez:
In-pixel ADC for a vision architecture on CMOS-3D technology. 3DIC 2010: 1-7
2000 – 2009
- 2009
- [j9]Rocío Maldonado-López, Fernando Vidal-Verdú, Gustavo Liñán, Ángel Rodríguez-Vázquez:
Integrated Circuitry to Detect Slippage Inspired by Human Skin and Artificial Retinas. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1554-1565 (2009) - [c11]Sonia Vargas-Sierra, Elisenda Roca, Gustavo Liñán Cembrano:
APS design alternatives in 0.18μm CMOS image sensor technology. ECCTD 2009: 1-4 - [c10]Gustavo Liñán Cembrano, Luis Carranza, Betsaida Alexandre, Elisenda Roca, Ángel Rodríguez-Vázquez:
A focal plane processor for continuous-time 1-D optical correlation applications. ECCTD 2009: 173-176 - 2007
- [c9]Gustavo Liñán Cembrano:
Focal plane processors & pixel level processing: mimicking natural vision systems to solve image processing problems. SBCCI 2007: 8 - 2006
- [c8]L. Carranza, R. Laviana, Sonia Vargas-Sierra, Jorge Cuadri, Gustavo Liñán, Elisenda Roca, Ángel Rodríguez-Vázquez:
Locust-inspired vision system on chip architecture for collision detection in automotive applications. ISCAS 2006 - 2004
- [j8]Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez, Ricardo Carmona-Galán, Francisco Jiménez-Garrido, Servando Espejo, Rafael Domínguez-Castro:
A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O. IEEE J. Solid State Circuits 39(7): 1044-1055 (2004) - [j7]Ángel Rodríguez-Vázquez, Gustavo Liñán Cembrano, L. Carranza, Elisenda Roca Moreno, Ricardo Carmona-Galán, Francisco Jiménez-Garrido, Rafael Domínguez-Castro, Servando Espejo-Meana:
ACE16k: the third generation of mixed-signal SIMD-CNN ACE chips toward VSoCs. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(5): 851-863 (2004) - 2003
- [j6]Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez, Servando Espejo-Meana, Rafael Domínguez-Castro:
ACE16k: A 128x128 Focal Plane Analog Processor with Digital I/O. Int. J. Neural Syst. 13(6): 427-434 (2003) - [j5]Oscar Guerra, Carlos M. Domínguez-Matas, Sara Escalera, José M. García-González, Gustavo Liñán, Rocío del Río, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez:
A modem in CMOS technology for data communication on the low-voltage power line. Integr. 36(4): 229-236 (2003) - [j4]Gustavo Liñán, Servando Espejo-Meana, Rafael Domínguez-Castro, Ángel Rodríguez-Vázquez:
An Improved Elementary Processing Unit For High-Density CNN-Based Mixed-Signal Microprocessors For Vision. J. Circuits Syst. Comput. 12(6): 675-690 (2003) - [c7]Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez, Rafael Castro-López, Servando Espejo-Meana:
A 1000FPS@128×128 vision processor with 8-bit digitized I/O. ESSCIRC 2003: 61-64 - [c6]Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez, Ricardo Carmona-Galán, Servando Espejo-Meana, Rafael Domínguez-Castro:
Analog weight buffering strategy for CNN chips. ISCAS (3) 2003: 522-525 - 2002
- [j3]Gustavo Liñán, Servando Espejo, Rafael Domínguez-Castro, Ángel Rodríguez-Vázquez:
ACE4k: An analog I/O 64×64 visual microprocessor chip with 7-bit analog accuracy. Int. J. Circuit Theory Appl. 30(2-3): 89-116 (2002) - [c5]Ángel Rodríguez-Vázquez, Gustavo Liñán, Servando Espejo-Meana, Rafael Domínguez-Castro:
Mismatch-induced tradeoffs and scalability of mixed-signal vision chips. ISCAS (5) 2002: 93-96 - [c4]Gustavo Liñán Cembrano, Servando Espejo-Meana, Rafael Domínguez-Castro, Ángel Rodríguez-Vázquez:
A processing element architecture for high-density focal plane analog programmable array processors. ISCAS (3) 2002: 341-344 - 2001
- [c3]Ángel Rodríguez-Vázquez, Servando Espejo-Meana, Rafael Domínguez-Castro, Ricardo Carmona-Galán, Gustavo Liñán:
CMOS design of focal plane programmable array processors. ESANN 2001: 57-62 - 2000
- [c2]Gustavo Liñán, Péter Földesy, A. Rodrignez-Vazquez, Servando Espejo, Rafael Domínguez-Castro:
Implementation of non-linear templates using a decomposition technique by a 0.5 μm CMOS CNN universal chip. ISCAS 2000: 401-404
1990 – 1999
- 1999
- [j2]Ricardo Carmona, Ignacio Garcia-Vargas, Gustavo Liñán, Rafael Domínguez-Castro, Servando Espejo, Ángel Rodríguez-Vázquez:
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips. Int. J. Circuit Theory Appl. 27(1): 43-76 (1999) - [j1]Elisenda Roca, Servando Espejo-Meana, Rafael Domínguez-Castro, Gustavo Liñán, Ángel Rodríguez-Vázquez:
A Programmable Imager for Very High Speed Cellular Signal Processing. J. VLSI Signal Process. 23(2-3): 305-318 (1999) - 1998
- [c1]Servando Espejo, Rafael Domínguez-Castro, Gustavo Liñán, Ángel Rodríguez-Vázquez:
A 64×64 CNN universal chip with analog and digital I/O. ICECS 1998: 203-206
Coauthor Index
aka: Servando Espejo
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