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Publication search results
found 26 matches
- 1992
- Anna Antola, Roberto M. Negrini, Mariagiovanna Sami, Nello Scarabottolo:
Fault tolerance in FFT arrays: Time redundancy approaches. J. VLSI Signal Process. 4(4): 295-316 (1992) - Mark G. Arnold, Thomas A. Bailey, John R. Cowles, Jerry J. Cupal:
Initializing RAM-based logarithmic processors. J. VLSI Signal Process. 4(2-3): 243-252 (1992) - K. S. Arun, D. R. Wagner:
High-speed digital filtering: Structures and finite wordlength effects. J. VLSI Signal Process. 4(4): 355-370 (1992) - Magdy A. Bayoumi, Padma Rao, Bassem A. Alhalabi:
VLSI parallel architecture for Kalman filterAn algorithm specific approach. J. VLSI Signal Process. 4(2-3): 147-163 (1992) - Paul M. Chau, Scott R. Powell:
Power dissipation of VLSI array processing systems. J. VLSI Signal Process. 4(2-3): 199-212 (1992) - Philippe Clauss
, Catherine Mongenet, Guy-René Perrin:
Calculus of space-optimal mappings of systolic algorithms on processor arrays. J. VLSI Signal Process. 4(1): 27-36 (1992) - Jean-Marc Delosme:
Bit-level systolic algorithms for real symmetric and Hermitian eigenvalue problems. J. VLSI Signal Process. 4(1): 69-88 (1992) - Yin-Tsung Hwang, Yu Hen Hu:
MSSM - A design aid for multi-stage systolic mapping. J. VLSI Signal Process. 4(2-3): 125-145 (1992) - Jung Hwan Kim, Phill-Kyu Rhee:
A resource-efficient reconfiguration algorithm of VLSI 2-D processor arrays. J. VLSI Signal Process. 4(4): 317-330 (1992) - Linda Kwai-Lin Lau, Rajeev Jain, Henry Samueli, Henry T. Nicholas III, Etan G. Cohen:
DDFSGEN. J. VLSI Signal Process. 4(2-3): 213-226 (1992) - Christian Lengauer, Jingling Xue
:
A systolic array for pyramidal algorithms. J. VLSI Signal Process. 4(1): 89 (1992) - G. Jack Lipovski:
A four megabit Dynamic Systolic Associative Memory chip. J. VLSI Signal Process. 4(1): 37-51 (1992) - Zhi-Jian (Alex) Mou:
A study of VLSI symmetric FIR filter structures. J. VLSI Signal Process. 4(4): 371-377 (1992) - K. Wojtek Przytula, Viktor K. Prasanna, Wei-Ming Lin:
Parallel implementation of neural networks. J. VLSI Signal Process. 4(2-3): 111-123 (1992) - Tatyana D. Roziner, Mark G. Karpovsky:
Multidimensional fourier transforms by systolic architectures. J. VLSI Signal Process. 4(4): 343-354 (1992) - Edwin Hsing-Mean Sha, Kenneth Steiglitz:
Error detection in arrays via dependency graphs. J. VLSI Signal Process. 4(4): 331-342 (1992) - Rajinder Jit Singh, John V. McCanny:
High performance VLSI architecture for Wave Digital Filtering. J. VLSI Signal Process. 4(4): 269-278 (1992) - Hosahalli R. Srinivas, Keshab K. Parhi
:
High-speed VLSI arithmetic processor architectures using hybrid number representation. J. VLSI Signal Process. 4(2-3): 177-198 (1992) - Michaël F. X. B. van Swaaij, Francky Catthoor, Hugo De Man:
Nonlinear transformations for high level regular array ASIC synthesis. J. VLSI Signal Process. 4(4): 259-268 (1992) - Earl E. Swartzlander Jr., Vijay K. Jain, Hiroomi Hikawa:
A radix-8 wafer scale FFT processor. J. VLSI Signal Process. 4(2-3): 165-176 (1992) - C. F. T. Tang, K. J. Ray Liu, Shih-Fu Hsieh, Kung Yao:
VLSI algorithms and architectures for complex householder transformation with applications to array processing. J. VLSI Signal Process. 4(1): 53-68 (1992) - Miguel Valero-García, Juan J. Navarro, José María Llabería
, Mateo Valero
, Tomás Lang:
A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units. J. VLSI Signal Process. 4(1): 7-25 (1992) - M. Yan, John V. McCanny:
Systolic inner product arrays with automatic word rounding. J. VLSI Signal Process. 4(2-3): 227-242 (1992) - Kung Yao:
Introduction. J. VLSI Signal Process. 4(2-3): 95-96 (1992) - Xiaoxiong Zhong, Sanjay V. Rajopadhye:
Quasi-Linear allocation functions for efficient array design. J. VLSI Signal Process. 4(2-3): 97-110 (1992) - Xiaoxiong Zhong, Sanjay V. Rajopadhye, Ivan Wong:
Systematic generation of linear allocation functions in systolic array design. J. VLSI Signal Process. 4(4): 279-293 (1992)
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retrieved on 2024-07-13 04:56 CEST from data curated by the dblp team
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