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Publication search results
found 34 matches
- 2004
- Bramha Allu, Wei Zhang:
Static next sub-bank prediction for drowsy instruction cache. CASES 2004: 124-131 - Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini
, Mauro Olivieri:
A post-compiler approach to scratchpad mapping of code. CASES 2004: 259-267 - Vasanth Asokan, Alexander G. Dean:
Providing time- and space- efficient procedure calls for asynchronous software thread integration. CASES 2004: 167-178 - Ken W. Batcher, Robert A. Walker:
Cluster miss prediction with prefetch on miss for embedded CPU instruction caches. CASES 2004: 24-34 - Giovanni Beltrame, Gianluca Palermo, Donatella Sciuto, Cristina Silvano:
Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs. CASES 2004: 85-92 - David Berner, Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla:
Modular design through component abstraction. CASES 2004: 202-211 - Surupa Biswas, Matthew S. Simpson, Rajeev Barua:
Memory overflow protection for embedded systems using run-time checks, reuse and compression. CASES 2004: 280-291 - Steve Carr
, Philip H. Sweany:
Automatic data partitioning for the agere payload plus network processor. CASES 2004: 238-247 - John Cornish:
Balanced energy optimization. CASES 2004: 156 - Noel Eisley, Li-Shiuan Peh:
High-level power analysis for on-chip networks. CASES 2004: 104-115 - Ali El-Haj-Mahmoud, Eric Rotenberg:
Safely exploiting multithreaded processors to tolerate memory latency in real-time systems. CASES 2004: 2-13 - Jesus Garcia, Mark G. Arnold, Leonidas G. Bleris, Mayuresh V. Kothare:
LNS architectures for embedded model predictive control processors. CASES 2004: 79-84 - Christophe Guillon, Fabrice Rastello, Thierry Bidault, Florent Bouchez:
Procedure placement using temporal-ordering information: dealing with code size expansion. CASES 2004: 268-279 - Shaoxiong Hua, Gang Qu:
Energy-efficient dual-voltage soft real-time system with (m, k)-firm deadline guarantee. CASES 2004: 116-123 - Mahmut T. Kandemir, Ozcan Ozturk, Mustafa Karaköy:
Dynamic on-chip memory management for chip multiprocessors. CASES 2004: 14-23 - Mary Kiemb, Kiyoung Choi:
Memory and architecture exploration with thread shifting for multithreaded processors in embedded systems. CASES 2004: 230-237 - Meilin Liu, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha:
General loop fusion technique for nested loops considering timing and code size. CASES 2004: 190-201 - Binu K. Mathew, Al Davis, Michael A. Parker:
A low power architecture for embedded perception. CASES 2004: 46-56 - Yusuke Matsuoka, Patrick Schaumont
, Kris Tiri, Ingrid Verbauwhede:
Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques. CASES 2004: 303-311 - Linwei Niu, Gang Quan
:
Reducing both dynamic and leakage energy consumption for hard real-time systems. CASES 2004: 140-148 - Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir:
Reducing energy consumption of queries in memory-resident database systems. CASES 2004: 35-45 - Ravishankar Rao, Sarma B. K. Vrudhula, Musaravakkam S. Krishnan:
Disk drive energy optimization for audio-video applications. CASES 2004: 93-103 - Montserrat Ros, Peter Sutton:
A hamming distance based VLIW/EPIC code compression technique. CASES 2004: 132-139 - Valentina Salapura, Christos J. Georgiou, Indira Nair:
An efficient system-on-a-chip design methodology for networking applications. CASES 2004: 212-219 - Klaus Schneider, Jens Brandt, Tobias Schüle:
Causality analysis of synchronous programs with delayed actions. CASES 2004: 179-189 - Timothy Sherwood
, Mark Oskin, Brad Calder:
Balancing design options with Sherpa. CASES 2004: 57-68 - Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
Translating affine nested-loop programs to process networks. CASES 2004: 220-229 - Ramakrishnan Venkitaraman, Gopal Gupta:
Static program analysis of embedded executable assembly code. CASES 2004: 157-166 - Sven Verdoolaege, Rachid Seghir, Kristof Beyls, Vincent Loechner, Maurice Bruynooghe:
Analytical computation of Ehrhart polynomials: enabling more compiler analyses and optimizations. CASES 2004: 248-258 - Kees A. Vissers:
Programming models and architectures for FPGA platforms. CASES 2004: 1
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retrieved on 2024-07-24 22:09 CEST from data curated by the dblp team
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