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Francesco Menichelli
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2020 – today
- 2024
- [j13]Marcello Barbirotta
, Francesco Menichelli
, Abdallah Cheikh
, Antonio Mastrandrea
, Marco Angioli
, Mauro Olivieri
:
Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems. IEEE Access 12: 95720-95735 (2024) - [j12]Marco Angioli
, Marcello Barbirotta
, Abdallah Cheikh
, Antonio Mastrandrea
, Francesco Menichelli
, Saeid Jamili
, Mauro Olivieri
:
Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme. IEEE Trans. Computers 73(7): 1767-1779 (2024) - 2023
- [c31]Marcello Barbirotta, Francesco Menichelli, Antonio Mastrandrea, Abdallah Cheikh, Marco Angioli, Saeid Jamili, Mauro Olivieri:
Heterogeneous Tightly-Coupled Dual Core Architecture Against Single Event Effects. ApplePies 2023: 15-21 - [c30]Saeid Jamili, Antonio Mastrandrea, Abdallah Cheikh, Marcello Barbirotta, Francesco Menichelli, Marco Angioli, Mauro Olivieri:
A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach. ApplePies 2023: 36-41 - [c29]Marcello Barbirotta, Marco Angioli, Antonio Mastrandrea, Abdallah Cheikh, Saeid Jamili, Francesco Menichelli, Mauro Olivieri:
Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design. ApplePies 2023: 42-48 - 2022
- [j11]Marcello Barbirotta
, Abdallah Cheikh
, Antonio Mastrandrea
, Francesco Menichelli, Mauro Olivieri
:
Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors. IEEE Access 10: 126074-126088 (2022) - [c28]Marco Angioli
, Marcello Barbirotta
, Abdallah Cheikh, Antonio Mastrandrea
, Francesco Menichelli, Saeid Jamili
, Mauro Olivieri:
Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators. ApplePies 2022: 149-154 - [c27]Saeid Jamili
, Abdallah Cheikh, Antonio Mastrandrea
, Marcello Barbirotta
, Francesco Menichelli, Marco Angioli
, Mauro Olivieri:
Implementation of Dynamic Acceleration Unit Exchange on a RISC-V Soft-Processor. ApplePies 2022: 300-306 - [c26]Marcello Barbirotta
, Abdallah Cheikh, Antonio Mastrandrea
, Francesco Menichelli, Mauro Olivieri:
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration. PRIME 2022: 237-240 - 2021
- [j10]Abdallah Cheikh, Stefano Sordillo, Antonio Mastrandrea
, Francesco Menichelli, Giuseppe Scotti, Mauro Olivieri:
Klessydra-T: Designing Vector Coprocessors for Multithreaded Edge-Computing Cores. IEEE Micro 41(2): 64-71 (2021) - [c25]Marcello Barbirotta
, Abdallah Cheikh, Antonio Mastrandrea
, Francesco Menichelli, Francesco Vigli, Mauro Olivieri:
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design. DFT 2021: 1-4 - [c24]Moustafa Saleh
, Ali Ibrahim, Francesco Menichelli, Yasser Mohanna, Maurizio Valle:
Efficient Machine Learning Algorithm for Embedded Tactile Data Processing. ISCAS 2021: 1-5 - 2020
- [c23]Marcello Barbirotta
, Antonio Mastrandrea
, Francesco Menichelli, Francesco Vigli, Luigi Blasi, Abdallah Cheikh, Stefano Sordillo, Fabio Di Gennaro, Mauro Olivieri:
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment. DFT 2020: 1-6 - [i2]Abdallah Cheikh, Stefano Sordillo, Antonio Mastrandrea, Francesco Menichelli, Giuseppe Scotti, Mauro Olivieri:
Klessydra-T: Designing Vector Coprocessors for Multi-Threaded Edge-Computing Cores. CoRR abs/2007.09109 (2020)
2010 – 2019
- 2019
- [j9]Giulia Stazi, Antonio Mastrandrea
, Mauro Olivieri
, Francesco Menichelli:
Full System Emulation of Approximate Memory Platforms with AppropinQuo. J. Low Power Electron. 15(1): 30-39 (2019) - [c22]Giulia Stazi, Antonio Mastrandrea
, Mauro Olivieri, Francesco Menichelli:
Quality Aware Selective ECC for Approximate DRAM. ApplePies 2019: 109-116 - [c21]Luigi Blasi, Francesco Vigli, Abdallah Cheikh, Antonio Mastrandrea
, Francesco Menichelli, Mauro Olivieri:
A RISC-V Fault-Tolerant Microcontroller Core Architecture Based on a Hardware Thread Full/Partial Protection and a Thread-Controlled Watch-Dog Timer. ApplePies 2019: 505-511 - [c20]Abdallah Cheikh, Stefano Sordillo, Antonio Mastrandrea
, Francesco Menichelli, Mauro Olivieri:
Efficient Mathematical Accelerator Design Coupled with an Interleaved Multi-threading RISC-V Microprocessor. ApplePies 2019: 529-539 - [c19]Giulia Stazi, Antonio Mastrandrea
, Mauro Olivieri
, Francesco Menichelli:
Quality Aware Approximate Memory in RISC-V Linux Kernel. PRIME 2019: 177-180 - 2018
- [c18]Giulia Stazi, Federica Silvestri, Antonio Mastrandrea
, Mauro Olivieri
, Francesco Menichelli:
Synthesis Time Reconfigurable Floating Point Unit for Transprecision Computing. ApplePies 2018: 261-267 - [c17]Giulia Stazi, Antonio Mastrandrea
, Mauro Olivieri
, Francesco Menichelli:
Approximate Memory Support for Linux Early Allocators in ARM Architectures. ApplePies 2018: 429-435 - [c16]Mauro Olivieri
, Usman Khalid, Antonio Mastrandrea
, Francesco Menichelli:
Characterizing noise pulse effects on the power consumption of idle digital cells. ISCAS 2018: 1-5 - [c15]Giulia Stazi, Antonio Mastrandrea
, Mauro Olivieri
, Francesco Menichelli:
AppropinQuo: A Platform Emulator for Exploring the Approximate Memory Design Space. NGCAS 2018: 66-69 - [c14]Giulia Stazi
, Lorenzo Adani, Antonio Mastrandrea
, Mauro Olivieri
, Francesco Menichelli
:
Impact of Approximate Memory Data Allocation on a H.264 Software Video Encoder. ISC Workshops 2018: 545-553 - 2017
- [c13]Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea
, Francesco Menichelli, Mauro Olivieri
:
The Microarchitecture of a Multi-threaded RISC-V Compliant Processing Core Family for IoT End-Nodes. ApplePies 2017: 89-97 - [c12]Mauro Olivieri
, Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea
, Francesco Menichelli:
Investigation on the Optimal Pipeline Organization in RISC-V Multi-threaded Soft Processor Cores. NGCAS 2017: 45-48 - [i1]Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
The microarchitecture of a multi-threaded RISC-V compliant processing core family for IoT end-nodes. CoRR abs/1712.04902 (2017) - 2016
- [c11]Francesco Menichelli, Giulia Stazi, Antonio Mastrandrea
, Mauro Olivieri
:
An Emulator for Approximate Memory Platforms Based on QEmu. ApplePies 2016: 153-159 - 2015
- [c10]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri
:
Narrowband Delay Tolerant Protocols for WSN Applications: Characterization and Selection Guide. ApplePies 2015: 109-121 - 2014
- [j8]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri
:
A Regulation-Based Security Evaluation Method for Data Link in Wireless Sensor Network. J. Comput. Networks Commun. 2014: 591920:1-591920:15 (2014) - [c9]Francesco Menichelli, Mauro Olivieri
:
A Platform-Based Emulator for Mass-Storage Flash Cards Evaluation in Embedded Systems. ApplePies 2014: 195-201 - [c8]Marco Marazza, Francesco Menichelli, Mauro Olivieri
, Orlando Ferrante, Alberto Ferrari:
A Model-Based Methodology to Generate Code for Timer Units. ApplePies 2014: 203-210 - 2013
- [c7]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri
:
Wireless and Ad Hoc Sensor Networks: An Industrial Example Using Delay Tolerant, Low Power Protocols for Security-Critical Applications. ApplePies 2013: 153-162 - 2012
- [j7]Claudio Santo Malavenda
, Francesco Menichelli
, Mauro Olivieri
:
Delay-Tolerant, Low-Power Protocols for Large Security-Critical Wireless Sensor Networks. J. Comput. Networks Commun. 2012: 863521:1-863521:10 (2012) - [c6]Alberto Ferrari, Marco Carloni, Alessandro Mignogna, Francesco Menichelli, David Ginsberg, Eelco Scholte, Dang Nguyen:
Scalable virtual prototyping of distributed embedded control in a modern elevator system. SIES 2012: 267-270 - 2011
- [c5]Francesco Menichelli, Mauro Olivieri
, Simone Smorfa:
Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-cores. ISCAS 2011: 1483-1486 - 2010
- [j6]Francesco Menichelli, Mauro Olivieri:
TikTak: A Scalable Simulator of Wireless Sensor Networks Including Hardware/Software Interaction. Wirel. Sens. Netw. 2(11): 815-822 (2010)
2000 – 2009
- 2009
- [j5]Francesco Menichelli, Mauro Olivieri
:
Static Minimization of Total Energy Consumption in Memory Subsystem for Scratchpad-Based Systems-on-Chips. IEEE Trans. Very Large Scale Integr. Syst. 17(2): 161-171 (2009) - 2008
- [j4]Francesco Menichelli, Renato Menicocci, Mauro Olivieri
, Alessandro Trifiletti:
High-Level Side-Channel Attack Modeling and Simulation for Security-Critical Systems on Chips. IEEE Trans. Dependable Secur. Comput. 5(3): 164-176 (2008) - 2007
- [j3]Marco Bucci, Raimondo Luzzi, Francesco Menichelli, Renato Menicocci, Mauro Olivieri
, Alessandro Trifiletti:
Testing power-analysis attack susceptibility in register-transfer level designs. IET Inf. Secur. 1(3): 128-133 (2007) - 2006
- [c4]Manfred Josef Aigner, Stefan Mangard, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Thomas Popp, Giuseppe Scotti, Alessandro Trifiletti:
Side channel analysis resistant design flow. ISCAS 2006 - 2005
- [b1]Francesco Menichelli:
Tecniche di analisi e progetto di architetture di sistemi a microprocessore integrati su singolo chip caratterizzati da criticità nei consumi di potenza. Sapienza University of Rome, Italy, 2005 - [j2]Luca Benini
, Davide Bertozzi, Alessandro Bogliolo
, Francesco Menichelli, Mauro Olivieri
:
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC. J. VLSI Signal Process. 41(2): 169-182 (2005) - [c3]Francesco Menichelli, Mauro Olivieri, Simone Smorfa, Irene Zaccardini:
Software optimization of the JPEG2000 algorithm on a VLIW CPU core for system-on-chip implementation. Circuits, Signals, and Systems 2005: 222-227 - 2004
- [j1]Luca Benini
, Francesco Menichelli, Mauro Olivieri
:
A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems. IEEE Trans. Computers 53(4): 467-482 (2004) - [c2]Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini
, Mauro Olivieri:
A post-compiler approach to scratchpad mapping of code. CASES 2004: 259-267 - [c1]Francesco Menichelli, Mauro Olivieri
, Luca Benini
, Monica Donno, Labros Bisdounis:
A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design. DATE 2004: 312-317
Coauthor Index
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last updated on 2024-08-05 21:22 CEST by the dblp team
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