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ORCIDKunal Korgaonkar
Person information
- affiliation: University of California San Diego
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Books and Theses
- 2019
[b1]Kunal Korgaonkar:
Building Scalable Architectures Using Emerging Memory Technologies. University of California, San Diego, USA, 2019
Journal Articles
- 2022
- [j2]Ronny Ronen, Adi Eliahu, Orian Leitersdorf
, Natan Peled, Kunal Korgaonkar, Anupam Chattopadhyay, Ben Perach, Shahar Kvatinsky:
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems. ACM J. Emerg. Technol. Comput. Syst. 18(2): 43:1-43:29 (2022) - 2009
- [j1]Kunal Korgaonkar, K. George, M. Gautam, V. Kamakoti:
HTM design spaces: complete decoupling from caches and achieving highly concurrent transactions. ACM SIGOPS Oper. Syst. Rev. 43(2): 98-99 (2009)
Conference and Workshop Papers
- 2023
- [c7]S. Sai Vineet, Natasha Meena Joseph, Kunal Korgaonkar, Arnab K. Paul:
A Data-Centric Approach for Analyzing Large-Scale Deep Learning Applications. ICDCN 2023: 282-283 - [c6]Natasha Meena Joseph, S. Sai Vineet, Kunal Korgaonkar, Arnab K. Paul:
Characteristics of Deep Learning Workloads in Industry, Academic Institutions and National Laboratories. ICDCN 2023: 318-323 - 2019
- [c5]Kunal Korgaonkar, Joseph Izraelevitz, Jishen Zhao, Steven Swanson:
Vorpal: Vector Clock Ordering For Large Persistent Memory Systems. PODC 2019: 435-444 - 2018
- [c4]Kunal Korgaonkar, Ishwar Bhati, Huichu Liu, Jayesh Gaur, Sasikanth Manipatruni, Sreenivas Subramoney, Tanay Karnik, Steven Swanson, Ian Young, Hong Wang:
Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache. ISCA 2018: 315-327 - 2015
- [c3]Shruti Patil, Yeseong Kim, Kunal Korgaonkar, Ibrahim Awwal, Tajana Simunic Rosing:
Characterization of User's Behavior Variations for Design of Replayable Mobile Workloads. MobiCASE 2015: 51-70 - 2012
- [c2]Ashok Gautham, Kunal Korgaonkar, Patanjali SLPSK, Shankar Balachandran, Kamakoti Veezhinathan:
The Implications of Shared Data Synchronization Techniques on Multi-Core Energy Efficiency. HotPower 2012 - 2011
- [c1]Kunal Korgaonkar, Prabhat Jain, Deepak Tomar, Kashyap Garimella, Veezhinathan Kamakoti:
Reconstructing Hardware Transactional Memory for Workload Optimized Systems. APPT 2011: 1-15
Editorship
- 2021
- [e1]Andrea Calimera, Pierre-Emmanuel Gaillardon, Kunal Korgaonkar, Shahar Kvatinsky, Ricardo Reis:
VLSI-SoC: Design Trends - 28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2020, Salt Lake City, UT, USA, October 6-9, 2020, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 621, Springer 2021, ISBN 978-3-030-81640-7 [contents]
Informal and Other Publications
- 2021
- [i2]Ronny Ronen, Adi Eliahu, Orian Leitersdorf, Natan Peled, Kunal Korgaonkar, Anupam Chattopadhyay, Ben Perach, Shahar Kvatinsky:
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems. CoRR abs/2107.10308 (2021) - 2019
- [i1]Kunal Korgaonkar, Ronny Ronen, Anupam Chattopadhyay, Shahar Kvatinsky:
The Bitlet Model: Defining a Litmus Test for the Bitwise Processing-in-Memory Paradigm. CoRR abs/1910.10234 (2019)
Coauthor Index
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