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Journal Articles
- 2018
[j6]Ganghee Lee
, Ediz Cetin, Oliver Diessel:
Fault Recovery Time Analysis for Coarse-Grained Reconfigurable Architectures. ACM Trans. Embed. Comput. Syst. 17(2): 42:1-42:21 (2018)- [j5]Zhuoran Zhao, Nguyen T. H. Nguyen, Dimitris Agiakatsikas, Ganghee Lee, Ediz Cetin, Oliver Diessel:
Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems. ACM Trans. Reconfigurable Technol. Syst. 11(1): 4:1-4:23 (2018) - 2014
- [j4]Kyuseung Han, Ganghee Lee, Kiyoung Choi:
Software-Level Approaches for Tolerating Transient Faults in a Coarse-GrainedReconfigurable Architecture. IEEE Trans. Dependable Secur. Comput. 11(4): 392-398 (2014) - 2011
- [j3]Ganghee Lee, Kiyoung Choi, Nikil D. Dutt:
Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 637-650 (2011) - 2010
- [j2]Ganghee Lee, Yongjin Ahn, Seokhyun Lee, Jeongki Son, Kiwook Yoon, Kiyoung Choi:
Communication architecture design for reconfigurable multimedia SoC platform. Des. Autom. Embed. Syst. 14(1): 1-20 (2010) - 2008
- [j1]Yongjin Ahn, Keesung Han, Ganghee Lee, Hyunjik Song, Jun-hee Yoo, Kiyoung Choi, Xingguang Feng:
SoCDAL: System-on-chip design AcceLerator. ACM Trans. Design Autom. Electr. Syst. 13(1): 17:1-17:38 (2008)
Conference and Workshop Papers
- 2018
- [c8]Dimitris Agiakatsikas, Ganghee Lee, Thomas Mitchell, Ediz Cetin, Oliver Diessel:
From C to Fault-Tolerant FPGA-Based Systems. FCCM 2018: 212 - 2017
- [c7]Ganghee Lee, Dimitris Agiakatsikas, Tong Wu, Ediz Cetin, Oliver Diessel:
TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS. FCCM 2017: 129-132 - 2010
- [c6]Ganghee Lee, Kiyoung Choi:
Thermal-aware fault-tolerant system design with coarse-grained reconfigurable array architecture. AHS 2010: 265-272 - [c5]Ganghee Lee, Seokhyun Lee, Kiyoung Choi, Nikil D. Dutt:
Routing-Aware Application Mapping Considering Steiner Points for Coarse-Grained Reconfigurable Architecture. ARC 2010: 231-243 - [c4]Ganghee Lee, Kyungwook Chang, Kiyoung Choi:
Automatic mapping of control-intensive kernels onto coarse-grained reconfigurable array architecture with speculative execution. IPDPS Workshops 2010: 1-4 - 2009
- [c3]Manhwee Jo, Ganghee Lee, Kyungwook Chang, Kyuseung Han, Kiyoung Choi, Hoonmo Yang, Kiwook Yoon:
Coarse-grained reconfigurable architecture for multiple application domains: a case study. ICHIT 2009: 546-553 - 2007
- [c2]Ganghee Lee, Seokhyun Lee, Yongjin Ahn, Kiyoung Choi:
Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration. ICSAMOS 2007: 50-57 - 2003
- [c1]Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh:
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. DATE 2003: 20132-20137
Parts in Books or Collections
- 2003
- [p1]Youngchul Cho, Ganghee Lee, Kiyoung Choi, Sungjoo Yoo, Nacer-Eddine Zergainoh:
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. Embedded Software for SoC 2003: 125-136
Coauthor Index
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