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Tarun Goel
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2020 – today
- 2020
- [c5]Jonathan Waller, Tarun Goel:
A Logic-Based Agent Modelling Paradigm for Investment in Derivatives Markets. SAI (2) 2020: 169-180
2010 – 2019
- 2019
- [j1]Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar:
Hardware architectures for PRESENT block cipher and their FPGA implementations. IET Circuits Devices Syst. 13(7): 958-969 (2019) - 2018
- [c4]Jai Gopal Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Abhijit Karmakar, Raj Singh:
A High-Performance VLSI Architecture of the Present Cipher and its Implementations for SoCs. SoCC 2018: 96-101 - [c3]Jai Gopal Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Sajid Khan, Santosh Kumar Vishvakarma, Abhijit Karmakar, Raj Singh:
A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations. VDAT 2018: 210-220 - [c2]Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar:
A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight Cipher. VLSID 2018: 392-397 - 2017
- [c1]Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar:
An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation. VDAT 2017: 270-278
Coauthor Index
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last updated on 2024-04-24 22:54 CEST by the dblp team
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